Yamaha RX-V320, Руководство по обслуживанию

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27
RX-V320
IC3 : YM3436DK (DIR2)
Digital Format Interface Receiver
Pin Pin
I/O Function
No. Name
1 DAUX I Audio data input from AC3D2av
2 HDLT O Unconnected
3 DOUT O Audio data output for AC3D2av
4 VFL O Unconnected
5 OPT O Unconnected
6 SYNC O Unconnected
7 MCC O 64fs bit clock output for AC3D2av
8 WC O 1fs word clock output for AC3D2av
9 MCB O Unconnected
10 MCA O 256fs bit clock output for CODEC
11 SKSY I Clock synchronization control input (Fixed H)
12 XI I Crystal oscillator connection (12.288MHz)
and external clock output for AC3D2av
13 XO O Crystal oscillator connection (12.288MHz)
14 P256 O Unconnected
15 LOCKN O PLL lock flag output for microcomputer
16 GND Ground
17 TST2 O Unconnected
18 DIM1 I
Data input mode selection 0,1
19 DIM0 I
20 DOM1 I
Data output mode selection 1,0 (Fixed L)
21 DOM0 I
22 KM1 I Compulsive analog performance mode
input from AC3D2av
23 /IC I Initial clear input from AC3D2av
24 VDDA Power supply
25 CTLN I VCO control negative input
Pin Pin
I/O Function
No. Name
26 PCO O P
Unconnected
LL phase comparison output
27 NC
28 CTLP I VCO control positive input (Fixed L)
29 GNDA Ground
30 TSTN I Unconnected
31 KM2 I
Clock mode switching input 2,0 (Fixed L)
32 KM0 I
33 FS1 O Unconnected
34 FS0 O Unconnected
35 CSM I Channel status output method selection(Fixed L)
36 EXTW I
External synchronous auxiliary input word
clock (Fixed L)
37 DIN I Digital audio data input
38 LR O Unconnected
39 VDD Power supply
40 ERR O Data error flag output for microcomputer
41 EMP O
Unconnected
42 CDO O Serial data output for microcomputer
43 CCK I
Serial clock input from microcomputer
44 CLD I
Serial data input from microcomputer
DAUX
HDL
T
DOUT
VFL
OPT
SYNC
MCC
WC
MCB MCA
SKSY
KM1
DOM0
DOM1
DIM0
DIM1
TST2
GND
LOCKN
P256
XO
XI
FS0
CSM
EXTW
DDIN
LR
VDD
ERR
EMP
CDO
CCK
CLD
FS1 KM0 KM2 TSTN GNDA CTLP NC PCO CTLN VDDA /IC
34
35
36
37
38
39
40
41
42
43
44
1 2 3 4 5 6 7 8 9
10 11
23 24 25 26 27 28 29 30 31 32 33
12
13
14
15
16
17
18
19
20
21
22
EIAJ (AES/EBU)
DIGITAL AUDIO
INTERFACE
DECODER
DATA CLOCK
CONTROLLER
SYSTEM
CLOCK
TIMING
GENERATOR
SEL
SERIAL INTERFACE
BUFFER
32 29 15 14 13 12 31 22 11 23
10
9
8
7
6
5
3
2 42 43 44 16 39 30 19 18 1
4
20
21
37
40
35
41
33
34
P/S
S/P
24 26 28 25 17
PLL
38
MCA
KMO
CLD CCK
CDO
DAUX
DIM1 DIM0
HDLT
GND
VDD
TSTN
VSSA VDDA PCO CTLP CTLN TST2 LR LOCKN P256 XO XI KM2 KM1 SKSY /IC
MCB
WC
MCC
SYNC
OPT
VFL
DOUT
DDIN
ERR
CSM
36
EXTW
EMP
FS1
FS0
DOM1
DOM0
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