![Yamaha RX-V100D Скачать руководство пользователя страница 34](http://html.mh-extra.com/html/yamaha/rx-v100d/rx-v100d_service-manual_902343034.webp)
RX-V100D
34
IC5 : D60YA003BPYP225 (DSP P.C.B.)
Decoder
No. Name
I/O
Function
157 CVDD
S
1.2V power supply
158 VSS
GND
Ground
159 AHCLKX1
IOZ
McASP1 transmission MCLK
160 GP0[8]
IOZ
General purpose I/O0 port 8
161 AHCLKR1
IOZ
McASP1 reception MCLK
162 DVDD
S
3.3V power supply
163 VSS
GND
Ground
164 GP0[3]
IOZ
General purpose I/O0 port 3
165 GP0[9]
IOZ
General purpose I/O0 port 9 (Unconnected)
166 GP0[10]
IOZ
General purpose I/O0 port 10 (Unconnected)
167 GP0[11]
IOZ
General purpose I/O0 port 11 (Unconnected)
168 GP0[12]
IOZ
General purpose I/O0 port 12
169 CVDD
S
1.2V power supply
170 VSS
GND
Ground
171 CVDD
S
1.2V power supply
172 GP0[13]
IOZ
General purpose I/O0 port 13
173 GP0[14]
IOZ
General purpose I/O0 port 14
174 GP0[15]
IOZ
General purpose I/O0 port 15
175 NMI
I
Nonmaskable Interrupt
↑
edge
176 /RESET
I
Device reset
177 CVDD
S
1.2V power supply
178 OSCIN
I
X’tal input, Oscillation: 12 to 25MHz
179 OSCOUT
O
X’tal output (Unconnected)
180 OSCVSS
GND
X’tal GND internal connection (Unconnected)
181 OSCVDD
S
X’tal 1.2V power supply internal connection (Unconnected)
182 VSS
GND
Ground
183 DVDD
S
3.3V power supply
184 CLKOUT3
O
Programmable clock output up to 32 division of PLL (Unconnected)
185 EMU1
IOZ
JTAG emulation pin 1 (1 k-ohms PD when boundary scanning)
186 EMU0
IOZ
JTAG emulation pin 0 (1 k-ohms PD when boundary scanning)
187 TDO
O/Z
JTAG Data Out
188 DVDD
S
3.3V power supply
189 VSS
GND
Ground
190 CVDD
S
1.2V power supply
191 TDI
I
JTAG Data In
192 TMS
I
JTAG Mode Select
193 TCK
I
JTAG Clock
194 VSS
GND
Ground
195 CVDD
S
1.2V power supply
196 CVDD
S
1.2V power supply
197 /TRST
I
JTAG Reset
198 RSV2
O/Z
Reserved (Unconnected)
199 PLLG
A
Analog GND for PLL
200 RSV0
A
Reserved (Unconnected)
201 PLLV
A
Analog 1.2V power supply for PLL
202 PLLHV
A
Analog 3.3V power supply for PLL
203 RSV1
I
Reserved (GND)
204 CLKIN
I
Clock input
205 CLKMODE0
I
PLL input clock selection: Clkin or X’tal
206 DVDD
S
3.3V power supply
207 VSS
GND
Ground
208 CVDD
S
1.2V power supply
IC451: M30626FHPF (SUBTRANS P.C.B.)
16-bit Microprocessor
PSV
PURD
/BLK
ISA
ISB
ONEA
ONEB
VRA
VRB
PRV
PRD
PLDET
THM
ADKEY0
ADKEY1
AVss
MODEL
VREF
AVcc
CEFD
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
VIA
DTZ2
DKZ2
/CE
/MTFS
/MTZ2
/MTSW
/MTCT
/EMP
/MTHP
/HP
SCKN
SDRN/DEST
SDTN
BSY
CLKF
RXDF
TXDF
DTFD
CKFD
LC1
SDM
SDD
SCK
BYTE
CNVss
/CSY
/ICY
RESET
Xout
Vss
Xin
Vcc
NMI
INTDSP
INTFCT
VSY
/CSDIR
/CSADM
/CSD
A
C
/ICD
/ICADM
VBIT
/CEEEP
CKEY
CEEV
DTEV
PRI
8/4DET
/4ohm
Z2R
Y
MAR
Y
REM
PSW
PDET
MBR
Y
ER
Y
SBR
Y
PR
Y
/ST
TUNED
TMT
SDRP
Vss
SCKP/TUN0
Vcc
SDTP
CEP/TUN1
RDSE
CES
TRIG
CMP1
CMP0
YCSEP
I/E
/VR
VIB
FL Driver TxD
FL Driver CLOCK
Limiter control output
DC TRIGGER output (Unconnected)
Serial data output to DIR, TI (DA601) / DIR : 4M, LSBF/TI : 1M, MSBF
Serial data input from DIR, TI (DA601)
Serial data clock output to DIR, TI (DA601), DAC
Vss : When single chip mode is used
Vss : When single chip mode is used, Vcc : When flash writing is used
Muting (HI=MUTE) of TI decoder DSP DA601
TI BUSY detection / CDDA write data input
Reset
Oscillation output (oscillation stopped in Sleep mode)
Ground for micro-processor
Oscillation input
Power 5V for micro-processor
Unused, connected to Vcc
Interruption of TI decoder DSP DA601
Interruption of DIR
DIR chip enable
TI decoder DSP DA601 chip enable
DAC (common to 2ch/8ch) chip enable
DIR reset
TI decoder DSP DA601 reset
TI DA601 Serial Ready / CDDA write WCK input
EEPROM CE
DAB SCLK
DAB SDATA
Electronic volume IC DATA
Data transmission terminal for AF220
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
P96/ANEX1/SOUT4
P95/ANEX0/CLK4
P94/DA1/TB4in
P93/DA0/TB3in
P92/TB2in/SOUT3
P91/TB1in/SIN3
P90/TB0in/CLK3
BYTE
CNVss
P87/Xcin
P86/Xcout
/RESET
Xout
Vss
Xin
Vcc1
P85/NMI
P84/INT2
P83/INT1
P82/INT0
P81/TA4in/U
P80/TA4out/U
P77/TA3in
P76/TA3out
P75/TA2in/W
P74/TA2out/W
P73/CTS2/RTS2/TA1in/V
P72/CLK2/TA1out/V
P71/RXD2/SCL2/TA0in/TB5in
P70/TXD2/SDA2/TA0out
P67/TXD1/SDA1
DTFD
CKFD
LIMIT
TRIG
SDM
SDD
SCK
BYTE
CNVss
MUTETI
TIBUSY
/RESET
Xout
Vss
Xin
Vcc
NMI
/INTTI
/INTDIR
N.C.
/CSDIR
/CSTI
/CSDAC
/ICDIR
/ICTI
SPIRDY
/CEEEP
CKZ2
DRXM
DTXM
DTEV
TXDF
SO
SO
DA
O
SO
SI
SO
MCU
MCU
O
I
MCU
MCU
MCU
MCU
MCU
MCU
IRQ
IRQ
O
O
O
O
O
O
O
I
O
SI
SO
SO
SO
O
O
O
O
O
O
O
MCU
MCU
O
O
MCU
MCU
MCU
MCU
MCU
MCU
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
MCU
MCU
O
O
MCU
MCU
MCU
MCU
MCU
MCU
O
O
O
O
O
O
O
O
O
O
O
O
O
O
No.
Port Name
Terminal Name
I/O
Function
PowerOn Pure Direct Standby
Sleep