Yamaha PortaTone PSR-270, Руководство по обслуживанию, Страница: 13 / 33

PSR-270
13
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HG73C201FD (XT890A00) SW X00 TONE GENERATOR
PIN
NO.
NAM E I/O FUNCTION
PIN
NO.
NAM E I/O FUNCTION
1 ICN I Initia l clear 85 CMA3 O Program a ddress bus
2 RFC LKI I PLL Clock 86 CMA8 O Program a ddress bus
3 TM2 I PLL Control 87 CMA2 O Program a ddress bus
4 AVD D_PLL Power supply 88 CR D O re ad signa l
5 AVSS_PL L Gro und 89 CMA1 O Program a ddress bus
6 MODE0 I SW X dual mode 90 CU B O high byte effe ctive signal
7 VCC7 Power supply 91 VCC9 1 Power supply
8 GND 8 Gro und 92 GHN D92 Gro und
9 XIN I crysta l o sci llator 93 CS1 O CS signa l
10 XOU T O crysta l o sci llator 94 CMA0 O Program a ddress bus
11 MODE1 I SW X sep arate mo de 95 CL B O low byte e ffective signal
12 TEST0 I TEST pin 96 CMA12 O Program a ddress bus
13 TESTON I TEST pin 97 CMA11 O Program a ddress bus
14 AN0-P40 I A/D conve rte r 98 CMA10 O Program a ddress bus
15 AN1-P41 I A/D conve rte r 99 CMA9 O Program a ddress bus
16 AN2-P42 I A/D conve rte r 100 GND 100 Gro und
17 AN3-P43 I A/D conve rte r 101 CW E O write signal
18 AVD D_AN Power supply 102 CMA16 O Program a ddress bus
19 AVSS_AN Gro und 103 CMA15 O Program a ddress bus
20 TXD 0 O for MID I or TO-H OST 104 CMA14 O Program a ddress bus
21 TXD 1 O for MID I 105 CMA13 O Program a ddress bus
22 EXCL K I Crystal oscil lator 106 CMD 8 I/O Program memory Data bus
23 SMD 11 I/O W ave memory data bus 107 CMD 7 I/O Program memory Data bus
24 SMD 4 I/O W ave memory data bus 108 CMD 9 I/O Program memory Data bus
25 SMD 3 I/O W ave memory data bus 109 CMD 6 I/O Program memory Data bus
26 SMD 12 I/O W ave memory data bus 110 CMD 10 I/O Program memory Data bus
27 SMD 10 I/O W ave memory data bus 111 CMD 5 I/O Program memory Data bus
28 SMD 5 I/O W ave memory data bus 112 CMD 11 I/O Program memory Data bus
29 SMD 2 I/O W ave memory data bus 113 CMD 4 I/O Program memory Data bus
30 SMD 13 I/O W ave memory data bus 114 CMD 12 I/O Program memory Data bus
31 SMD 9 I/O W ave memory data bus 115 CMD 3 I/O Program memory Data bus
32 SMD 6 I/O W ave memory data bus 116 CMD 13 I/O Program memory Data bus
33 SMD 1 I/O W ave memory data bus 117 CMD 2 I/O Program memory Data bus
34 SMD 14 I/O W ave memory data bus 118 CMD 14 I/O Program memory Data bus
35 VCC3 5 Power supply 119 VCC1 19 Power supply
36 GND 36 Gro und 120 GND 115 Gro und
37 SMD 8 I/O W ave memory data bus 121 CMD 1 I/O Program memory Data bus
38 SMD 7 I/O W ave memory data bus 122 CMD 15 I/O Program memory Data bus
39 SMD 0 I/O W ave memory data bus 123 CMD 0 I/O Program memory Data bus
40 SMD 15 I/O W ave memory data bus 124 CMA21 O Program a ddress bus
41 SOE O re ad signa l 125 PDT15 I/O SW X access data b us
42 SW E O write signal 126 PDT14 I/O SW X access data b us
43 SRAS O RAS signal 127 PDT13 I/O SW X access data b us
44 SCAS O CAS signal 128 PDT12 I/O SW X access data b us
45 REFRESH O REFRESH signa l 129 PDT11 I/O SW X access data b us
46 CS0 O CS signa l 130 PDT10 I/O SW X access data b us
47 SMA0 O Memory a ddre ss bus 131 PDT9 I/O SW X access data b us
48 SMA16 O Memory a ddre ss bus 132 PDT8 I/O SW X access data b us
49 VCC4 9 Power supply 133 VCC1 33 Power supply
50 GND 50 Gro und 134 GND 134 Gro und
51 SMA1 O Memory a ddre ss bus 135 PDT7 I/O SW X access data b us
52 SMA15 O Memory a ddre ss bus 136 PDT6 I/O SW X access data b us
53 SMA2 O Memory a ddre ss bus 137 PDT5 I/O SW X access data b us
54 SMA14 O Memory a ddre ss bus 138 PDT4 I/O SW X access data b us
55 SMA3 O Memory a ddre ss bus 139 PDT3 I/O SW X access data b us
56 SMA13 O Memory a ddre ss bus 140 PDT2 I/O SW X access data b us
57 SMA4 O Memory a ddre ss bus 141 PDT1 I/O SW X access data b us
58 SMA12 O Memory a ddre ss bus 142 PDT0 I/O SW X access data b us
59 SMA5 O Memory a ddre ss bus 143 VCC1 43 Power supply
60 GND 60 Gro und 144 GND 144 Gro und
61 VCC6 1 Power supply 145 PAD 2 I SW X access addre ss bus
62 SMA11 O Memory a ddre ss bus 146 PAD 1 I SW X access addre ss bus
63 SMA6 O Memory a ddre ss bus 147 PAD 0 I SW X access addre ss bus
64 SMA10 O Memory a ddre ss bus 148 VCC1 48 Power supply
65 SMA7 O Memory a ddre ss bus 149 GND 149 Gro und
66 SMA9 O Memory a ddre ss bus 150 PCS I Chip select
67 SMA17 O Memory a ddre ss bus 151 PW R I write ena ble
68 SMA8 O Memory a ddre ss bus 152 PRD I re ad enable
69 SMA18 O Memory a ddre ss bus 153 RXD0 I for Midi or TO-HOST
70 SMA19 O Memory a ddre ss bus 154 RXD1 I for Midi or Ke y scan
71 SMA20 O Memory a ddre ss bus 155 SCLKI I EXT Clock
72 SMA21 O Memory a ddre ss bus 156 ADIN I A/D converter
73 SMA22 O Memory a ddre ss bus 157 ADLR O A/D converter LR clo ck
74 SMA23 O Memory a ddre ss bus 158 DO0 O DAC
75 CMA20 O Program a ddress bus 159 DO1 O DAC
76 CMA19 O Program a ddress bus 160 SYSCLK O 1/2 clock
77 VCC7 7 Power supply 161 VCC1 61 Power supply
78 GND 78 O Gro und 162 GND 162 Gro und
79 CMA18 O Program a ddress bus 163 W CL K O for DAC LR clock
80 CMA17 O Program a ddress bus 164 QCL K O 1/12 clock
81 CMA5 O Program a ddress bus 165 BCLK O IIS-D AC clock
82 CMA6 O Program a ddress bus 166 SYI I Synch signal
83 CMA4 O Program a ddress bus 167 IRQ0 I Interrupt request
84 CMA7 O Program a ddress bus 168 NMI I Interrupt request