59
YMC-700/YMC-500
YMC-70
0/YMC-50
0
Pin
No.
Port Name
Function Name
I/O
Detail of Function
31
DGND
–
Digital GND
32
MOUT
–
I/O
Emphasis information II input fs monitor output II chip address
setting input pin
33
AUDIO
–
I/O
Channel status bit 1 output II chip address setting input pin
34
CKST
–
I/O
Clock switching transition period signal output II master/slave
setting input pin
35
INT
–
I/O
Microprocessor interrupt signal output II pins 44-48 I/O setting input
pin
36
RERR
–
O
PLL lock error and data error flag output pin
37
DO
–
O
CCB microprocessor I/F, read data output pin (3-state)
38
DI
–
l5
CCB microprocessor I/F, write data input pin
39
CE
–
l5
CCB microprocessor I/F, chip enable input pin
40
CL
–
l5
CCB microprocessor I/F, clock input pin
41
XMODE
–
l5
System reset input pin
42
DGND
–
Digital GND
43
DVDD
–
Digital power supply (3.3V)
44
GPIO0
AUDIO_SEL_A
O
Audio DSP input selector
45
GPI01
AUDIO_SEL_B
O
Audio DSP input selector
46
GPI02
HTX_AUDIO_SEL
O
HDMI TX output audio selector
47
GPI03
–
O
(no use)
48
RXOUT2
–
O
RX0-6 input S/PDIF through output pin 2
*
Input voltage: 1= -0.3 to 3.6V, Is =-0.3 to 5.5V
*
Output voltage: 0= -0.3 to 3.6V
*
Pins 2, 4, 5, 8, 9, 10, 24, 38, 39, 40, and 41 have an internal pull-down resistor (Pd).
Their level is fixed when they are unselected.
*
Pins 32 and 33 are input pins for chip address setting when pin 41 is held at the low level.
*
Pin 34 serves as the input pin for designating as the master or slave when pin 41 is held at the low level.
*
Pin 35 serves as the input pin for configuring the I/O of pins 44 to 47 when pin 41 is held at the low level.
*
The DVDD and AVDD pins must be held at the same level and turned on and off at the same timing to preclude latch-
up conditions.
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