LMY2-MLAB
16
2-10. Sound Production Inspection (Both CH1A and CH1A and CH2A)
Input frequency of 1 kHz.
Set DipSW of UNC so that GAIN=Sweep.
Check that the output level varies.
2-11.CMG Adjustment (Both CH1A and CH2A)
Condition
Connect a resistor as follows.
q
Adjusting VR100 and VR200
Set GAIN for 48 dB, apply a signal of +8 dBu/kHz to AMY2-MLAB and adjust the pre-set volume (VR100 for CH1A and
VR200 for CH2A) so that the output level can be as low as possible. Check that the adjusted output level is -46 dBu or less.
w
Adjusting VR101 and VR201
Set GAIN for 18 dB, apply a signal of +8 dBu/kHz to AMY2-MLAB and adjust the pre-set volume (VR101 for CH1A and
VR201 for CH2A) so that the output level can be as low as pssible. Check that the adjusted output level is -60 dBu or less.
Take care of VR*** because it is a multi-rotary type (25 +/-5 rotations) without a stopper.
3.
Setting DipSW for AI8 and AO8 (UNC)
The construction of UNC circuit board is the same for both AI8 and AO8, htough each DipSW has a different meaning.
Though the following shows the setting, DipSW is not used in any case. (Null)
R1 24Ω Note 1
LMY2-MLAB(CH1A or CH2A)
C
H
G
Note 1)Limit the relative error of two 24 ohm resistors to a maximum 50 m ohm.
Clock is provided from INPUT A
GAIN = +24 dB set
R1 24Ω Note 1
0: Debug
1: ALL A
1: ALL OFF
1: ALL MIN (0 dB)
0: ALL B
0: ALL ON
0: 2, 3, 4 GAIN mode
(*1)
4
3
2
1
8
CPU
1: ON
UNC circuit board
0: OFF
7
6
5
1, 0, 1
Int39 kHz
1, 0, 1
66 dB
0, 1, 1
Int44.1 kHz
0, 1, 1
78 dB
0, 0, 1
(OUTPUT A)
0, 0, 1
54 dB
1, 1, 0
(OUTPUT B)
1, 1, 0
48 dB
0, 1, 0
(OUTPUT C)
0, 1, 0
36 dB
0, 0, 0
no use
0, 0, 0
12 dB
1, 0, 0
BNC
1, 0, 0
18 dB
WC
WC
WC
If DipSW7 is off, it provides "WCSel = Int 48 kHz fixed and DipSW2, 3, & 4 in GAIN mode."
(*2):
A variance of 6 dB occurs every two seconds. (
0dB → 78dB → 0dB → 78dB ...
)
※AI8 (UNC) DipSW setting [1: ON (=GND) 0: OFF (=+5V)]
4
3
2
1
ON
8
7
6
5
※AO8 (UNC)DipSW setting [1: ON (=GND) 0: OFF (=+5V)]
For further details, about AO8 DipSW, refer to LMY4-DA.
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