i88X
20
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VREFL
GNDL
VCOML
AINL+
AINL-
ZCAL
VD
DGND
CAL
/RST
SMODE2
SMODE1
LRCK
SCLK
O
O
I
I
I
O
I
I
I
I/O
I/O
Lch voltage reference output
Lch ground
Lch common voltage
Lch positive analog input
Lch negative analog input
Zero calibration
Digital power 3.3V
Digital ground
Calibration status
Reset
Serial interface mode select
L/R channel select clock
Serial data clock
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SDATA
FSYNC
MCLK
DFS
HPFE
TEST
BGND
AGND
VA
AINR-
AINR+
VCOMR
GNDR
VREFR
O
I/O
I
I
I
I
I
I
O
O
Serial data output
Frame synchronization clock
Master clock input
Double speed sampling mode select
HPF enable
Test
Substrate ground
Analog ground
Analog power 5V
Rch negative analog input
Rch positive analog input
Rch common voltage
Rch ground
Rch voltage reference output
AK5383-VS (XW272A00) ADC (Analog to Digital Converter)
DM: IC16
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
HD64F3024F (X4855C00) CPU
DM:IC505
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
-
O
O
O
O
O
O
O
O
I
-
O
O
I
I
O
O
O
O
O
O
-
O
O
O
O
Data
Data
Data
Data
Data
Data
Data
Data
-
O
O
O
O
O
O
O
O
-
I
I
I
I
I
I
MLN2 Master /Slave
control mode of ADC
If fs= 88.2KHz or 96KHz, then this signal is ’H’.
If Master= MLN , then this signal is ’H’.
If OPT-input is ADAT , then this signal is ’H’.
If ADAT mode is Doble , then this signal is ’H’.
latch clear
control Analog mute
not use (reserved)
not use (reserved)
not use (reserved)
not use (reserved)
control LED
control LED
reset
PoweDown
reset
reset
ADAT CLK Enable
reset
Enable Monitor LED
mute
I
I
I
I
I
I
-
O
O
O
-
-
-
-
-
-
-
-
O
O
O
O
-
-
-
-
-
I
I
I
I
I
I
I
I
-
O
I
O
O
I
-
I
O
O
O
O
O
O
O
reserved
panel Switch
panel Switch
panel Switch
/RD for ATSC2
/WR for ATSC2
mLAN root
MLN2 Master /Slave
indicate ASYNC of MLN2(Latched)
indicate ASYNC of MLN2
indicate Lock of MLN2
indicate Lock of ADAT-IN
indicate Error of SPDIF-DIR
not use (reserved)
for serial interface
for serial interface
WCLK input for counting frequency
for serial interface
for serial interface
for serial interface
for serial interface
for serial interface
for serial interface
for serial interface
Vic
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
FWE
Vss
P90
P91
P92
P93
P94
P95
P40
P41
P42
P43
Vss
P44
P45
P46
P47
D8
D9
D10
D11
D12
D13
D14
D15
Vcc
A0
A1
A2
A3
A4
A5
A6
A7
Vss
P20
P21
P22
P23
P24
P25
P26
P27
P50
P51
P52
P53
Vss
P60
P61
P62
P6/
/STBY
/RES
NMI
Vss
EXTAL
XTAL
Vcc
/AS
/RD
/HWR
/LWR
MD0
MD1
MD2
AVcc
Vref
P70
P71
P72
P73
P74
P75
P76
P77
AVss
P80
P81
/CS2
/CS1
P84
Vss
TCLKA
PA1
PA2
PA3
PA4
PA5
PA6
PA7
Содержание i88x
Страница 30: ...i88X 30 A A DM Circuit Board C Version ...
Страница 31: ...i88X 31 A A Pattern Side パターン側 2NA WC21750 C323 The pattern is cut パターンがカットされています ...
Страница 32: ...i88X 32 DM Circuit Board D Version to JK1 CN101 to JK1 CN102 to JK1 CN105 to JK1 CN104 to JK2 CN202 A A ...
Страница 34: ...i88X 34 DM Circuit Board D Version A A ...
Страница 35: ...i88X 35 Pattern Side パターン側 2NA WC21750 A A ...
Страница 66: ...i88X 66 ...