Yamaha HTR-3069, Руководство по обслуживанию

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64
RX-V381/HTR-3069
RX-V381/HTR-3069
No.
Function Name
(P.C.B.)
I/O Detail of Function
7 6 EMB_D[14 ] / GP 6 [14 ] I/O EMIFB SDRAM data bus
77 CVDD
7 8 EMB_D[1 3] / GP 6 [1 3] I/O EMIFB SDRAM data bus
7 9 EMB_D[12 ] / GP 6 [12 ] I/O EMIFB SDRAM data bus
8 0 EMB_D[11 ] / GP 6 [11 ] I/O EMIFB SDRAM data bus
8 1 DVDD
8 2 EMB_D[10 ] / GP 6 [10 ] I/O EMIFB SDRAM data bus
83 EMB_D[ 9] / GP 6 [ 9] I/O EMIFB SDRAM data bus
8 4 EMB_D[ 8] / GP 6 [ 8] I/O EMIFB SDRAM data bus
85 EMB_WE_DQM[1 ] / GP 5 [14 ] O EMIFB write enable/data mask for EMB_D
86 EMB_CL K O EMIF SDRAM clock
8 7 DVDD
88 EMB_SDC K E O EMIFB SDRAM clock enable
89 EMB_A[12 ] / GP 3 [1 3] O EMIFB SDRAM row/column address bus
89 EMB_A[12 ] / GP 3 [1 3] O EMIFB SDRAM row/column address bus
9 0 DVDD
9 1 EMB_A[11 ] / GP7[1 3] O EMIFB SDRAM row/column address bus
9 2 EMB_A[ 9] / GP7[11 ] O EMIFB SDRAM row/column address bus
93 CVDD
9 4 EMB_A[ 8] / GP7[10 ] O EMIFB SDRAM row/column address bus
95 EMB_A[7 ] / GP7[ 9] O EMIFB SDRAM row/column address bus
96 EMB_A[ 6] / GP7[ 8] O EMIFB SDRAM row/column address bus
9 7 EMB_A[ 5] / GP7[7 ] O EMIFB SDRAM row/column address bus
98 EMB_A[4 ] / GP7[ 6] O EMIFB SDRAM row/column address
99 DVDD
100 EMB_A[ 3] / GP7[ 5] O EMIFB SDRAM row/column address
101 EMB_A[2 ] / GP7[4 ] O EMIFB SDRAM row/column address
102 EMB_A[1 ] / GP7[ 3] O EMIFB SDRAM row/column address
10 3 EMB_A[0 ] / GP7[2 ] O EMIFB SDRAM row/column address
104 CVDD
10
5 EMB_A[10 ] / GP7[12 ] O EMIFB SDRAM row/column address bus
10 6 EMB_BA[1 ] / GP7[0 ] O EMIFB SDRAM bank address
107 EMB_BA[0 ] / GP7[1 ] O EMIFB SDRAM bank address
10 8 EMB_CS[0 ] O EMIFB SDRAM chip select 0
10 9 DVDD
110 EMB_RAS O EMIFB SDRAM row address strobe
111 AXR0[0 ] /AFSR2/GP 3 [0 ] I/O McASP0 serial data
I/O McASP2 serial data
112 AXR0[1 ] / ACL K X2/GP 3 [1 ] I/O McASP0 serial data
I/O McASP2 transmit bit clock
11 3 AXR0[2 ] / AXR2[ 3] /GP 3 [2 ] I/O McASP0 serial data
I/O McASP2 serial data
114 CVDD
11
5 AXR0[ 3] / AXR2[2 ] /GP 3 [ 3] I/O McASP0 serial data
I/O McASP2 serial data
11 6 AXR0[4 ] / AXR2[1 ] /GP 3 [4 ] I/O McASP0 serial data
I/O McASP2 serial data
117 AXR0[ 5] / AFSX2/GP 3 [ 5] I/O McASP0 serial data
I/O McASP2 transmit frame sync
11 8 AXR0[ 6] / ACL K R2/GP 3 [ 6] McASP0 serial data
11 9 DVDD
120 AXR0[7 ] /GP 3 [7 ] I/O McASP0 serial data
121 AXR0[ 8] /GP 3 [ 8] I/O McASP0 serial data
122 UART1_RXD/AXR0[ 9] /GP 3 [ 9] I UART1 receive data
I/O McASP0 serial data
12 3 UART1_TXD/AXR0[10 ] /GP 3 [10 ] O UART1 transmit data
I/O McASP0 serial data
124 AXR0[11 ] / AXR2[0 ] /GP 3 [11 ] I/O McASP0 serial data
I/O McASP2 serial data
12 5 A H CL K X0/A H CL K X2/USB_REFCL K IN/GP2[11 ] I/O McASP0 transmit master clock
I/O McASP2 transmit master clock
I USB_REFCL K IN. Optional 4 8 M H z clock input
12 6 ACL K X0/ECAP0/APWM0/GP2[12 ] I/O McASP0 transmit bit clock
I/O Enhanced capture 0 input or auxiliary PWM 0 output
127 AFSX0/GP2[1 3] /BOOT[10 ] I/O McASP0 transmit frame sync
I BOOT[10 ]