32
DVX-1000
NX-SW1000
No.
Port Name
I/O
Signal Name
Explanation
Resistance
Function State1
State2
Pin Multiple
EMIF32
L1P Cache
Direct Mapped
4K Bytes Total
Digital Signal Processors
L1D Cache
2-Way Set
Associative
4K Bytes Total
Clock Generator,
Oscillator and PLL
x4 through x25 Multipliers
/1 through /32 Dividers
Power-Down
Logic
Instruction Fetch
Instruction Dispatch
Instruction Decode
Data Path B
Data Path A
B Register File
Control
Registers
C67x
TM
CPU
Control
Logic
In-Circuit
Emulation
Interrupt
Control
Test
A Register File
.L1t
McASP1
McASP0
McBSP1
McBSP0
I2C1
I2C0
Timer 1
Timer 0
.S1t .M1t .D1
.D2 .M2t .S2t .L2t
GP1
GP0
HPI16
Enhanced
DMA
Controller
(16 channel)
L2 Cache/
Memory
4 Banks
64K Bytes
Total
(4-Way)
L2
Memory
DA610:
192K Bytes
DA601:
64K Bytes
R2 ROM
512K
Bytes
Total
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
GP0[4]/EXT_INT4/AMUTEIN1
GP0[6]/EXT_INT6
CVDD
VSS
DVDD
GP0[5]/EXT_INT5/AMUTEIN0
GP0[7]/EXT_INT7
SLKS1/SCL1
DVDD
VSS
CVDD
TINP1/AHCLKX0
TOUT1/AXR0[4]/AXR1[11]
CVDD
VSS
CLKX0/ACLKX0
TINP0/AXR0[3]/AXR1[12]
TOUT0/AXR0[2]/AXR1[13]
CLKR0/ACLKR0
DX0/AXR0[1]/AXR1[14]
FSX0/AFSX0
CVDD
VSS
FSR0/AFSR0
DVDD
VSS
DR0/AXR0[0]/AXR1[15]
CLKS0/AHCLKR0
CVDD
VSS
FSX1
DX1/AXR0[5]/AXR1[10]
CLKX1/AMUTE0
VSS
CVDD
CLKR1/AXR0[6]/AXR1[9]
DR1/SDA1
FSR1/AXR0[7]/AXR1[8]
VSS
CVDD
SCL0
I/O
I/O
POWER
GND
POWER
I/O
I/O
I
POWER
GND
POWER
I
I/O
POWER
GND
I/O
I/O
I/O
I/O
I/O
I/O
POWER
GND
I/O
POWER
GND
I/O
I/O
POWER
GND
I/O
I/O
I/O
GND
POWER
I/O
I
I/O
GND
POWER
I/O
DSP_MUTE3
-
P12V
DGND
P33V
-
-
P33V
P33V
DGND
P12V
-
-
P12V
DGND
-
-
-
DSP_BCK
-
-
P12V
DGND
DSP_WCK
P33V
DGND
-
-
P12V
DGND
DSP_CEN3
DSP_SDO3
DSP_SCK3
DGND
P12V
-
DSP_SDI3
-
DGND
P12V
P33V
DSP MUTE control “H”
→
MUTE
General purpose I/O port (no used)
1.2V power supply
Ground
3.3V power supply
General purpose I/O port (no used)
General purpose I/O port (no used)
Outside pull up
3.3V power supply
Ground
1.2V power supply
Inside pull down (timer1 input)
Inside pull down (audio data input)
1.2V power supply
Ground
Inside pull down (McASP0 transmission BCLK)
Inside pull down (audio data input)
Inside pull down (audio data input)
DSP bit clock input
Inside pull up (McASP0 sending and receiving data)
Inside pull down (McASP0 transmission LRCLK)
1.2V power supply
Ground
DSP word clock input
3.3V power supply
Ground
Inside pull up (McASP0 sending and receiving data)
Inside pull down (McASP0 transmission MCLK)
1.2V power supply
Ground
Chip enable “L” (McBSP1)
Microcomputer I/F serial data OUT (McBSP1)
Chip enable “L” (McBSP1)
Ground
1.2V power supply
Inside pull down (McBSP1 reception clock)
Microcomputer I/F serial data IN (McBSP1)
Inside pull down (McBSP1 frame Sync)
Ground
1.2V power supply
Outside pull up
13 k
Ω
13 k
Ω
13 k
Ω
10 k
Ω
18 k
Ω
18 k
Ω
18 k
Ω
18 k
Ω
18 k
Ω
18 k
Ω
13 k
Ω
18 k
Ω
18 k
Ω
13 k
Ω
18 k
Ω
18 k
Ω
13 k
Ω
18 k
Ω
18 k
Ω
10 k
Ω
I
I/O/Z
I/O/Z
I/O/Z
I
I
I
I/O/Z
I
I
I
I
I/O/Z
I
I
I/O/Z
I
I/O
I/O
I/O/Z
I
I/O/Z
I/O/Z
PU
PU
PU
PU
PD
PD
PD
PD
PD
PD
PU
PD
PD
PU
PD
PD
PU
PD
PD
PD
default
default
default
default
default
default
McASP1
McASP0
McASP1
McASP1
McASP0
McASP0
McASP0
McASP0
McASP0
McASP0
McBSP1
default
default
default
default
default
IC1: D60YA003BPYP225 (DSP (1) P.C.B.)
Decoder
* No replacement part available.
サービス部品供給なし
■
IC DATA
Содержание DVX -1000
Страница 6: ...6 DVX 1000 DVX 1000 Front view Side view Front view Side view NX SW1000 NX P1000 ...
Страница 8: ...8 DVX 1000 DVX 1000 F model J model Rear view Bottom view Rear view Bottom view DVR 1000 ...
Страница 9: ...9 DVX 1000 DPX 1200 DVX 1000 R model A model K model G F models NX SW1000 ...
Страница 10: ...10 DVX 1000 DVX 1000 L model J model Red Black NX SW1000 NX P1000 Rear view Bottom view ...