Yamaha DVD-S2500, Руководство по обслуживанию

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DVD-S2500
39
■
SCHEMATIC DIAGRAM
The first digit of a component indicates the component type.
1xxx : Connector 3xxx : Resistor 5xxx : Coil 7xxx : IC, Transistor, FET
2xxx : Capacitor 4xxx : SMD jumper 6xxx : Diode 9xxx : Wire jumper
FOR INFORMATION ONLY (NO REPLACEMENT PARTS WILL BE AVAILABLE)
DEMUX
DEMUX
COLOR CONTROL
BRIGHTNIS
DNR
GAMMA
PROG FILTERS
SD TESTPATTERN
PROGRAMMABLE
RGB MATRIX
HIGH DEFINITION
CONTROL BLOCK
COLOR CONTROL
SHARPNESS FILTER
ADAPT FILTER CTRL
HD TESTPATTERN
2
I C/SPI
12-BIT
DAC
INTERFACE
TIMING
GEN
OVERSAMPLING
PLL
DGND
VDD
12-BIT
DAC
12-BIT
DAC
12-BIT
DAC
DAC
12-BIT
DAC
12-BIT
DEMUX
STANDARD DEFINITION
CONTROL BLOCK
INTERRUPT
LOGIC
LP FILTER
INPUT
FILTER
I
2
C BUS
CONTROL
POWER-ON
RESET
I/O
PORTS
SHIFT
REGISTER
8 BIT
F229 B1
F230 B2
F231 C2
F232 A5
F233 I2
ADV7320 must be used for EU version.
Running change to ADV7320 for other regions.
ADV7320 supports CGMS 625P.
F209 F2
F210 F2
F211 G2
F212 G2
F222 G5
P3
P1
*
P4
7201 A10
7202 C10
7203 A11
7204 A12
P4
P4
P3
* Option
P1
F208 F2
P4
NOTE FOR VIDEO DAC 7202 APPLN:
F223 H5
F224 H5
F225 H5
F226 H5
F227 I5
F228 I5
3288 I12
3289 B3
F213 G2
F214 G2
F215 G2
F216 H2
F217 H2
F218 H2
F219 I2
F220 G5
F221 G5
PROGRESSIVE
P1
P1
AZ2
5202 B11
5203 B12
5205 F3
3272 A7
3277 A6
F201 D2
F202 E2
F203 E2
F204 E2
F205 E2
F206 F2
F207 F2
P1
P1
P1
P1
P2
P1
3260 I9
3261 B1
4200 D3
4201 E3
4209 H14
4210 H10
4211 H2
4214 B12
4215 F2
AV4
3278 B7
3279 B5
3280 E2
3281 C4
3282 D2
3283 D2
3257 G9
P1
P1
P1
P3
P1
P1
3237 D9
3238 E9
3239 E9
3262 B2
3263 A11
3264 A12
3267 B2
3268 B2
3269 A7
3249 F9
#
P1
3224 A11
3225 A10
3250 F9
3251 F9
3252 G9
3253 G9
3254 G9
3255 G9
3256 G9
3236 D9
P1
#
ADV7310
P1
3240 E9
3241 E9
3242 E9
3243 E9
3244 E9
3245 F9
3246 F9
3247 F9
3248 F9
3223 A8
P2
5206 is out and provisional. See P4.
P1
If 5V for HDMI socket from external
source, 5205 is in to supply 5V circuitry.
# #
3227 H2
3228 B3
3229 C7
3230 C9
3231 C9
3232 D9
3233 D9
3234 D9
3235 D9
3213 I9
NOTE FOR DVDR755 APPLN:
2217 A14
2218 B12
2219 G14
2220 F13
2221 I11
DC vtg measured in STOP-MODE
INTERLACED
3214 I9
3216 I11
3218 B7
3219 A6
3220 H9
3221 H9
3222 B4
3203 C13
P-scan_Ext_DAC
P1, P2
3204 C14
3205 F13
3206 F14
3208 G13
3209 H14
3210 G10
3211 H14
3212 H10
2214 C11
#
P2
P2
2215 C13
V
#
F
2222 I11
2223 C4
2224 F2
2226 G3
2227 B1
2228 I6
3201 A5
3202 A7
G
# #
P1
*
8 9
1203 A4
1210 F3
2201 I12
2203 I10
2210 B10
2212 B11
2213 C12
E
P2
P2
P1,P2,P4
P3
#
P1
10 11
G
H
I
A
B
C
D
E
F
7
#
P4
#
P4
P1, P2
Remove 3228.
RESET APPLN:
Stuff 3289, 3464 and 3481.
# Refer Variant Table
P2
P1
12 13 14
1 2 3 4 5 6
H
I
1000 D1
IA0
#
P4
P1
P1
P3
P4
P4
#
P3
P2
P4
1 2 3 4 5 6 7 8
#
#
NOTE FOR DELAYED
P2
#
P2
10 11 12 13 14
A
B
C
D
9
#
+5VD
F215
47R
3238
4215
BSN20
7204
22R
3225
47R
3249
3232
1R0
3280
22R
4u7
2223
22R
+5VD
3260
3208 4K7
3222 4K7
F202
3268
1R0
+3V3D
+5VD
4209
F210
F230
1R0
3269
22R
3237
+5VD
3202
10K
F203
SSSS9
2
1
3
1203
330R
3204
3210
10K
3216
680R
22R
3209
3240
47R
2224
100n
10n
2214
3279
100R
3281
5K6
3264 22K
3244
47R
2215
100n
1R0
3267
2K7
3203
F214
AV
47K
3282 3283
47K
F217
F219
3228
1R0
3262
10K
47R
3245
10K
3261
100n
2226
4211
3218
1R0
3234
5203
22R
F211
F208
DLINE_1
DLINE_3 DLINE_2
5205
4210
F204
F206
47R
3251
+3V3D_V
F209
F 1A
1210
4K7
3272
3231
1R0
3219
22R
100p
2201
100n 2227
56 46
VREF
2 Y0
Y1 3
4 Y2
5 Y3
6 Y4
7 Y5
8 Y6
9 Y7
Y8 12
13 Y9
S1 52
S2 53
S3 54
S4 55
S5 58
S6 59
S7 60
S8 61
S9 62
22 SCLK-SI
SDA-CLKSP 21
SPI_|I2C 19
VAA
41 1
VDD-IO
10
57 34
EXT-LF
64
GND-IO
P-BLANK 25
P-HSYNC_ 23
P-VSYNC_ 24
RESET_
33
RSET1 47
35 RSET2
RTC-SCR-TR 31
48 S-BLANK_
50 S-HSYNC_
49 S-VSYNC_
S0 51
26
C6 27
C7 28
29 C8
C9 30
CLKIN-A
32
CLKIN-B
63
COMP1 45
COMP2 36
DAC-A 44
DAC-B 43
DAC-C 42
DAC-D 39
DAC-E 38
DAC-F 37
11
7202
40
20 ALSB-SO
14 C0
C1 15
C2 16
C3 17
C4 18
C5
2212
100n
F207
3214
47R
F232
820p
+5VD
2222
3205
2K7
47R
3250
+5VD
4214
3242
47R
47R
AV
3254
DPDET#
F233
22R
3233
3211
22R
F231
2221
3n3
4200
22R
3213
22R
3224
47R
3241
+5VD
AV
100n
2217
47R
3248
100n
2220
2203
10p
3256
47R
3243
47R
3246
47R
3255
47R
3252
3230
47R
22R
2219 100n
100R
3278
30
4
5
6
7
8
9
17
18
19
2
20
21
22
23
24
25
26
27
28
29
3
1000
1
10
11
12
13
14
15
16
3223
47K
3220
F205
10K
F216
+5VD
100R
3277
22R
3236
100n 2213
3212
10K
5202
3201
4K7
3206
330R
47R
2210
100n
3257
3263
2218
10n
22K
47R
3239
F201
15 SDA
16
VDD
VSS 8
1
A0
2
A1
3
A2
13 INT_
4 P0
5 P1
6 P2
7 P3
9
P4
P5 10
11 P6
12 P7
14 SCL
PCF8574T
7201
F212
F218
AV
+5VD
4201
+5V
7203
BSN20
3235
22R
47R
3253
3247
47R
3227
1R0
47K
F229
3288
3229
1R0
3221
10K
F213
3289
1R0
RESET_SII
HDMI_PSCAN_INTERLACE
+3V3D_V
RESET_P6
HSYNC
PCM_MCLK
INT
SDA_5V
SCL_5V
27M_CLK
YB(0)
YB(1)
YB(2)
YB(4)
YB(5)
YB(6)
YB(7)
SCL_3V3
YB(0)
YB(1)
27M_CLK
SDA_3V3
+3V3D_VDAC
SPDIF_IN
YB(3)
+2V5D_V
V
U
Y
+3V3D_VDAC
+2V5A_V
UVA(0)
UVA(9)
YA(2)
SDA_5V
SCL_5V
RESET
YA(9)
UVA(1)
UVA(3)
UVA(5)
UVA(7)
SDA_3V3
RESET
CVBS
LUMA
CHROMA
P_HSYNC
P_VSYNC
SCL_3V3
+2V5A_V
+2V5A_V
+2V5A_V
+2V5A_V
+2V5A_V
P_CLK
VSYNC
YA(4)
YB(2)
YB(4)
YB(6)
YA(0)
YA(6)
YA(8)
UVA(2)
UVA(4)
UVA(6)
UVA(8)
YB(3)
YB(5)
YB(7)
YA(1)
YA(3)
YA(5)
YA(7)
PSCAN BOARD (2/4)
T
O
1501 OF MONO BO
ARD
Page 26 1B
SCAN
MODE
* Components having special characteristics are marked
Z
and
must be replaced with parts having specifications equal to those
originally installed.
* Schematic diagram is subject to change without notice.
* Z 印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
* 本回路図は、標準回路図です。改良のため予告なく変更することがございます。