Yamaha DSP-AX863SE, Руководство по обслуживанию

Страница: 67 / 155

67
RX-V863/HTR-6180/DSP-AX863SE/DSP-AX863
RX-V863/HTR-6180/DSP-AX863SE/
DSP-AX863
IC44 : D70YE101BRFP266 (DIGITAL P.C.B.)
Floating-point digital signal processors
* No replacement part available. / サービス部品供給なし
256
256
C67x+ Microprocessor
D1
64
R/W
Data
D2
R/W
Program
Fetch
Memory
Controller
Program/Data
RAM
256K Bytes
JTAG EMU
McASP DMA Bus
P
eripheral Configuration Bus
McASP0
16 Serializers
McASP1
6 Serializers
McASP2
2 Serializers
DIT Only
SPI1
SPI0
I2C0
I2C1
RTI
PLL
Program/Data
ROM Page1
256K Bytes
Program/Data
ROM Page2
256K Bytes
Program/Data
ROM Page3
256K Bytes
High-performance
Crossbar Switch
CSP
PMP DMP
Program
Cache
32K Bytes
I/O
I/O MAX0 MAX1 Events
In
CONTROL
dMAX
EMIF
Peripheral Interrupt and DMA Events
Interrupts
Out
INT
Data
256
256
256
256
32
32
32
32
32
32
32
32
32
32 32
64
32
32 32 32
32
32
32
32
32
32
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
50
49
48
47
46
45
44
43
42
41
40
39
38
37
56
55
54
53
52
51
62
61
60
59
58
57
68
67
66
65
64
63
72
71
70
69
108 107 106 105 104 103 102 101 100
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73
131
132
133
134
135
136
137
138
139
140
141
142
143
144
125
126
127
128
129
130
119
120
121
122
123
124
113
114
115
116
117
118
109
110
111
112
V
SS
AHCLKX0/AHCLKX2
AMUTE0 AMUTE1
AHCLKX1
V
SS
A
C
LKX1 CV
DD
A
C
LKR1
DV
DD
AFSX1
AFSR1
V
SS
RESET
V
SS
CV
DD
CLKIN
V
SS
TMS
CV
DD
TRST
OSCV
SS
OSCIN
OSCOUT
OSCV
DD
V
SS
PLLHV
TDI
TDO
V
SS
DV
DD
EMU[0]
CV
DD
EMU[1]
TCK
V
SS
V SS
EM_CKE
EM_CLK
V
SS
DV
DD
EM_WE_DQM[1]
EM_D[8]
CV
DD
EM_D[9]
EM_D[10]
V
SS
EM_D[11]
DV
DD
EM_D[12]
EM_D[13]
CV
DD
EM_D[14]
EM_D[15]
V
SS
CV
DD
EM_D[0]
EM_D[1]
DV
DD
EM_D[2]
EM_D[3]
V
SS
EM_D[4]
EM_D[5]
CV
DD
EM_D[6]
DV
DD
EM_D[7]
V
SS
EM_WE_DQM[0]
EM_WE
EM_CAS
SPI0_CLK/I2C0_SCL SPI0_SCS/I2C1_SCL V
SS
SPI0_ENA/I2C1_SD
A
EM_OE DV
DD
EM_R
W
CV
DD
EM_CS[2] V
SS
EM_RAS EM_CS[0] EM_B
A
[0]
V
SS
EM_B
A
[1]
EM_A[10] DV
DD
EM_A[0] CV
DD
EM_A[1] EM_A[2] V
SS
EM_A[3] CV
DD
EM_A[4] EM_A[5] V
SS
DV
DD
EM_A[6] EM_A[7] V
SS
CV
DD
EM_A[8] EM_A[9] EM_A[11] DV
DD
V
SS
SPI0_SIMO
SPI0/SOMI/I2C0_SDA
DV
DD
AXR0[0]
V
SS
AXR0[1]
AXR0[2]
AXR0[3]
V
SS
AXR0[4]
AXR0[5]/SPI1_SCS
AXR0[6]/SPI1_ENA
AXR0[7]/SPI1_CLK
CV
DD
V
SS
DV
DD
AXR0[8]AXR1[5]/SPI1_SOMI
AXR0[9]AXR1[4]/SPI1_SIMO
CV
DD
V
SS
AXR0[10]/AXR1[3]
AXR0[11]/AXR1[2]
CV
DD
V
SS
AXR0[12]/AXR1[1]
AXR0[13]/AXR1[0]
DV
DD
AXR0[14]/AXR2[1]
AXR0[15]/AXR2[0]
ACLKR0
V
SS
AFSR0
ACLKX0
AHCLKR0/AHCLKR1
AFSX0