RX-V730/RX-V730RDS/RX-V630/RX-V630RDS
HTR-5560/HTR-5560RDS/DSP-AX630/DSP-AX630SE
45
RX-V730/RX-V730RDS/RX-V630/RX-V630RDS
HTR-5560/HTR-5560RDS/DSP-AX630/DSP-AX630SE
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
RAMA9
RAMA3
RAMA4
SELI9
SELI10
SELI11
SELI12
SELI13
RAMA2
RAMA5
RAMA1
RAMA6
RAMA0
RAMA7
RAMA8
VDD1
VSS
RASN
RAMOEN
RAMWEN
CASN
RAMD15
RAMD14
RAMD13
RAMD12
RAMD11
RAMD10
RAMD9
RAMD8
VDD1
VSS
RAMD7
RAMD6
RAMD5
RAMD4
ZEROBF0L
ZEROBF0R
ZEROBF1L
ZEROBF1R
RAMD3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
XO
XI
SELI1
SELI0
SELOA
SELOB
TESTMS
TESTXEN
IPORT0
IPORT1
IPORT2
IPORT3
IPORT4
DDIN0
DDIN1
DDIN2
DDIN3
VSS
CPO
AVDD
DIRPCO
DIRPRO
AVSS
TESTBRK
TESTR1
TESTR2
VDD1
SDWCKI0
SDBCKI0
/SDBCKO
IPORT8
IPORT9
IPORT10
IPORT11
SDIA
SDOA2
SDOA1
SDOA2
SDIB3
SDIB2
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
VDD2
TESTXO
TESTXI
SELI2
SELI3
VSS
SELI4
IPINT
/IC
SCK
SI
SO
/CS
DIRINT
/LOCK
CRC
SURENC
VDD1
KARA
OKE
MUTE
A
C
3
D
ATA
DTSD
A
T
A
NONPCM
VSS
ZER
OFLG
O
VFB/END
RAMA17
RAMA16
RAMA15
RAMA14
RAMA13
RAMA12
SELI5
SELI6
SELI7
SELI8
VDD2
VSS
RAMA11
RAMA10
SDIB1
SDIB0
VSS
VDD2
IPOR
T12
IPOR
T13
IPOR
T14
DIRSDO
DIR
WCK
DIRBCK
DIRMCK
ERR/BS
SYNC/U
FS128/C
DBL/V
SD
WCKI1
SDBCKI1
VSS
SDOB3
SDOB2
SDOB1
SDOB0
VDD1
ZER
OBF3R
ZER
OBF3L
ZER
OBF2R
ZER
OBF2L
OPOR
T0
OPOR
T1
OPOR
T2
OPOR
T3
OPOR
T4
OPOR
T5
OPOR
T6
OPOR
T7
VSS
VDD2
RAMD0
RAMD1
RAMD2
YSS938
Main DSP
(AC-3/ProLogic/DTS Decorder)
DIRSDO
SDIB Interface
SDOB Interface
SubDSP
SDIASEL
DIRBCK
SDDA Interface
SDIA Interface
DIRO Interface
PLL
PLL
VMOD
SDIA
DIRPCO
CRC
SURNEC
KARAOKE
MUTE
CRC
AC3DATA
DTSDATA
NONPCM
ZEROFLG
SDIB0
SDIB1
SDIB2
SDIB3
SDOA0
SDOA1
SDOA2
DIRPRO
XO XI
CPO
RAMOEN
RAMA0-17
OVFB/END
RASN
RAMWEN
RAMD0-15
CASN
/LOCK
V
5
IPORT5-7
6
7
DBL
DIR
DBL/V
ERR
BS
BSMOD
SYNC
U
UMOD
FS128
C
CMOD
ERR/BS
SYNC/U
FS128/C
DIRINT
DDINSEL
DDIN3
DDIN2
DDIN1
DDIN0
Clock at DIR
(25 MHz)
DSP Clock
(30 MHz)
L, R
LS, RS
C, LFE
DIRMCK
SDWCKI0
/SDBCKO
IPORT0-4
DIRWCK
IPORT8-14
IPINT
SCK
SI
/cs
So
OPORT0-7
SELI0-13
SDBCKI0
SDIACKSEL
Control Register
µ
-COM Interface
Coefficient,
Program
RAM
Control Signals
SDIBCKSEL
SDIBSEL
SDOBCKSEL
MPLOAD
SELA
SELB
External
Memory
Interface
ZEROBF3R-0L
OVFSEL
SDOB2
SDOB3
SDOB1
SDOB0
SDWCKI1
SDBCKI1
SELOA
SELOB
OVFB
END
IC600 : YSS938
DSP