Yamaha DSP-AX2, Руководство по обслуживанию

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A B C D E F G H
1
2
3
4
5
6
I J K L
7
8
DSP-AX2
■
SCHEMATIC DIAGRAM (VIDEO 1/2)
* All voltage are measured with a 10M
Ω
/V DC electric volt meter.
* Components having special characteristics are marked
Z
and
must be replaced with parts having specifications equal to those
originally installed.
* Schematic diagram is subject to change without notice.
Point
t
(Pin 3 of IC610)
V : 1V/div, H : 50 nsec/div
DC, 1 : 1 probe
0V
E-77/J-75
SUPERIMPOSE
S-SIGNAL DETECTOR
INPUT
SELECTOR
S-VIDEO AMP
REC OUT
SELECTOR
S-VIDEO AMP
OUTPUT EXPASION
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1.0
0.3
5.0
0
0
0.7
0
0.7
5.0
1.0
1.7
1.0
1.0
5.0
1.7
5.0
0
-0.1
-0.1 1.0
1.0
4.8
0.8
0.8
1.6
-4.9
-0.1
0
0
1.0
1.6
1.0
0
0
0
0
0
3.1
0
0
-4.8
0
0
-4.8
-4.8
0
0
3.1
0
0
-4.8
0
0
4.8
0
0
4.9
0
-0.1
0
-4.8
-4.8
4.9
-0.1
0
4.8
-0.1
3.2
-4.8
5.0
0
0
0
0
-4.9
0
0
-4.9
0
5.0
5.0
0
0
0
-4.9
0
5.0
5.0
0
0
0
-4.9
0
5.0
5.0
0
0
0
-4.9
0
5.0
4.5
4.5
5.0
5.0
4.3
0.9
4.3
-0.9
-1.6
-0.5
0.2
0.9
-0.5
0
-0.6
0.7
-0.6
0
5.0 5.0 5.0 0 5.0 0 2.0 5.0 0.9 0 1.7
1.7
2.4
2.5
1.7
0
2.4 2.5
4.8
4.8
0
5.0
0 0
4.8
5.0 0 0 5.0 0 3.2 3.2
0
2.7
2.7
5.0
0
0
0
0
5.0
0
5.0
0
0
4.5 4.9
4.2
2.6
2.7
2.6
0
5.0
0 0
5.0
0
t
CIRCUIT CHANGES BY MARKET.
IC608 : TC74HCUO4AP
Hex Inverters
1A
1Y
2Y
V
DD
6A
1
2
3
4 11
2A 6Y
5A
12
13
14
3A
3Y
5Y
4A
5
6
7 V
SS
4Y 8
9
10
IC611 : BU2092
Serial In/Parallel Out Driver
CONTROL
CIRCUIT
OUTPUT B
UFFER (OPEN DRAIN)
128BIT ST
ORA
GE REGISTER
128BIT SHIFT REGISTER
10
11
12
13
14
15
16
17
18
VSS
DATA
CLOCK
LCK
Q0
Q1
Q2
Q3
Q4
VDD
OE
Q11
Q10
Q9
Q8
Q7
Q6
Q5
1
2
3
4
5
6
7
8
9
IC601 : TK15420M
VIdeo Amp
– +
OUT
A
–IN
A
V
EE
V
CC
OUT
B
1
2
3
4 5
+IN
A
–IN
B
+IN
B
– +
6
7
8
IC609 : LA7109
75
Ω
Video Driver
6dB DR
6dB DR
6dB DR
1
2
3
4
5
6
7
8
36
35
34
33
32
31
30
29
VIN1+
NFB1
MUTE1
VIN2+
NFB2
–VCC1
VIN3+
NFB3
N.C.
N.C.
+VCC1
VOUT1
GND
VOUT2
DR CTL2
VOUT3
MUTE4
–VCC4
N.C.
N.C.
6dB DR
6dB DR
6dB DR
11
12
13
14
15
16
17
18
26
25
24
23
22
21
20
19
VIN4+
NFB4
MUTE2
VIN5+
NFB5
–VCC2
VIN6+
NFB6
+VCC2
VOUT4
GND
VOUT5
DR CTL1
VOUT6
MUTE3
–VCC3
28
27
9
10
LEVEL
CONVERTER
BINARY TO 1-OF-8
DECODER WITH INHIBIT
11
10
9
8
7
6 16
13 SW
SW
SW
SW
SW
SW
SW
SW
14
15
12
1
5
2
4
3
INHIBIT VDD
X
A
B
C
VSS
VEE
X0
X1
X2
X3
X4
X5
X6
X7
IC602–605 : TC74HC4051AP
Analog Multiplexer/Demultiplexer
INPUT STATES
INHIBIT
0
0
0
0
0
0
0
0
1
C
0
0
0
0
1
1
1
1
X
B
0
0
1
1
0
0
1
1
X
A
0
1
0
1
0
1
0
1
X
“ON” CHANNEL (S)
0
1
2
3
4
5
6
7
NONE
IC607 : TC74HC4053AP
Triple 2-Channel Multiplexer/Demultiplexer
16
VDD
LOGIC LEVEL
CONVER
TER
12
OX
7
VEE
6
INH
OUT C IN
13
IX
OUT C IN
2 OY OUT C IN
1
IY OUT C IN
5
OZ OUT C IN
3 IZ OUT C IN
4 Z-COMMON
15
14 X-COMMON
Y-COMMON
9 C
10 B
11 A
8
VSS
INHIBIT
(Pin 6)
L
L
L
L
L
L
L
L
H
CONTROL INPUTS “ON” CHANNEL
0X (Pin 12), 0Y (Pin 2), 0Z (Pin 5)
1X (Pin 13), 1Y (Pin 1), 1Z (Pin 3)
0X, 0Y, 0Z
1X, 0Y, 0Z
0X, 1Y, 0Z
1X, 1Y, 0Z
0X, 0Y, 1Z
1X, 0Y, 1Z
0X, 1Y, 1Z
1X, 1Y, 1Z
NOTE
C
(Pin 9)
L
L
L
L
H
H
H
H
*
B
(Pin 10)
L
L
H
H
L
L
H
H
*
A
(Pin 11)
L
H
L
H
L
H
L
H
*
* Don’t Care
P-E78/J76
C-3
P-E78/J76
F-3
P-E73/J71
L-7
Conditions
• INPUT: DVD auto
• PROGRAM: PRO LOGIC DSP