Yamaha DSP-AX1700, Руководство по обслуживанию

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RX-V1700/DSP-AX1700
62
RX-V1700/
DSP-AX1700
No. Port Name
Terminal Name
Port I/O Function
(P.C.B.)
IC402: M30845FJGP (FUNCTION P.C.B)
Single chip 16/32-bit microprocessor
Data transmission to VIDEO_CPU
Clock transmission to VIDEO_CPU
Limiter control output
HDMI MUTE input
iPod asynchronous serial data input
iPod asynchronous serial data output
Vertical sync pulse INT
Rec out SW1 control (ROHM) data, clock speed: 20us (U, C, R, T, A, B, G, E,
L models)
Rec out SW1 control (ROHM) clock (U, C, R, T, A, B, G, E, L models)
Rec out SW1 control (ROHM) data, clock speed: 20us
Rec out SW1 control (ROHM) clock
2sh DAC (PCM1791A) *6 chip enable
YSS930 (IC550, 552 DSP P.C.B.) chip enable
External data bus width change: 16bit
Processor mode select: Single chip mode
DIR initial clear
TI initial clear
Remote control pulse input 1
Power detect
RS232C • YDC signal reception detect
iPod detect
TI (IC534 DSP P.C.B.) chip enable
DABIC IC reset (U model)
RDS enable (G model)
XM Radio power control (U.C models)
TI (IC534 DSP P.C.B.) interrupt
DIR (IC506 DSP P.C.B.) chip enable
DIR interrupt
TI (IC534 DSP P.C.B.) serial ready / DIR WCK input (WCK input for CDDA writing)
DABIC IC RxD (XM data reception) (U, C models)
DABIC IC TxD (U, C models)
Usually RS-232C asynchronous communication data output
Usually RS-232C asynchronous communication data input
Usually RS-232C asynchronous RTS output
Usually RS-232C asynchronous CTS input
Serial data output to DIR (IC506 DSP P.C.B.), TI (IC534 DSP P.C.B.),
YSS930 (IC550, 552 DSP P.C.B.), DAC (IC569-574 DSP P.C.B.)
Serial data reception to DIR (IC506 DSP P.C.B.), TI (IC534 DSP P.C.B.),
YSS930 (IC550, 552 DSP P.C.B.), DAC (IC569-574 DSP P.C.B.)
Serial clock output to DIR (IC506 DSP P.C.B.), TI (IC534 DSP P.C.B.),
YSS930 (IC550, 552 DSP P.C.B.), DAC (IC569-574 DSP P.C.B.)
Digital full mute (Hi=Mute)
CDDA write data input
PLL data output, transmission clock 4us for tuner
PLL clock output for tuner
PLL reception, reception clock 20us for tuner
TUNER mute output
TUNER TUNED input
PLL chip select for TUNER
TUNER STEREO detect input
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
TXD4
CLK4
DA1
TB3in/DA0
SDA3/TXD3/TB2in
SCL3/RXD3/TB1in
TB0in
P146
P145
P144
P143
P142
P141
P140
BYTE
CNVss
P87
P86
RESET
Xout
Vss
Xin
Vcc
NMI
INT2
INT1
INT0
TA4in
P80
TA3in/P77
P76
TA2in
P74/TA2out
TA1in
P72/CLK2/TA1out
P71/RxD2/SCO2
P70/TXD2/SDA2
P67/TxD1
Vcc
P66/RxD1
Vss
P65/CLK1
P64/CTS1/RTS1/
P63/TxD0
P62/RxD0
P61/CLK0
P60/CTS0/RTS0
P137
P136
P135
P134
P57/RDY
P56/RAS
P55/HOLD
P54/HLDA
TXDH
CLKH
LMTCNT
HDMINT
TXDi
RXDi
/VSYNC
RSELDT0
RSELCK0
ISELDT0
ISELCK0
/CSDAC2
/CSDAC1
/CSY
BYTE
CNVss
/ICD
/ICTI
RESET
Xout
Vss
Xin
Vcc
NMI
REM1
PDET
RXDR
iPDET
/CSTI
/ICXM
RDSCE
XMPWR
/INTTI
/CSDIR
/INTDIR
SPIRDY
DRXM
DTXM
TXDR
Vcc
RXDR
Vss
RTS
CTS
TXDD
RXDD
CLKD
DMT
CDDA
TUDA
TUCK
PLLR
/TMUTE
TUNED
TUCE
/ST
SO
SO
DA
TMR
SO
SI
TMR
O
O
O
O
O
O
O
MCU
MCU
O
O
MCU
MCU
MCU
MCU
MCU
IRQ
IRQ
IRQ
IRQ
TMR
O
O
O
O
TMR
O
TMR
I
SI
SO
SO
MCU
SI
MCU
SO
I
SO
SI
SO
O
I
O
O
I
O
I
O
I