Yamaha DG60-112, Руководство по обслуживанию

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PIN
NO.
I/O FUNCTION NAME
PIN
NO.
I/O FUNCTION NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
VSS
XI
XO
VDD
/SYNCI
/SYNCO
CKI
CKO
CKSL
VSS
MCKS
/SSYNC
/IC
/TEST
BTYP
/IRQ
TRIG
VDD
VSS
/CS
/DS
R/W
CA7
CA6
CA5
CA4
CA3
CA2
CA1
CA0/CD15
CD14
CD13
CD12
CD11
CD10
CD09
CD08
CD07
CD06
VSS
VDD
CD05
CD04
CD03
CD02
CD01
CD00
/DTACK
SI0
SI1
SI2
SI3
SI4
SI5
SI6
SI7
VSS
VDD
SO0
SO1
SO2
SO3
SO4
SO5
SO6
SO7
DB00
DB01
DB02
DB03
DB04
DB05
DB06
DB07
DB08
DB09
DB10
DB11
DB12
VDD
I
I
O
I
O
I
I
I
I
I
I
O
I/O
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I
I
O
O
O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Ground
System master clock input (60 M or30 MHz)
System master clock input (60 M or30 MHz)
Power supply
System synch. input
System synch. output
System clock input (30 MHz)
System clock output (30 MHz)
System master clock select (0:60 M,1:30 MHz)
Ground
Master clock for serial I/O(128 xFs)
Synch. signal for serial I/O
Initial clear
Test mode setting
CPU data bus 8/16 bit select(0:8,1:16)
Interrupt request
Trigger signal
Power supply
Ground
Chip select
Data strobe
Read/Write select
CPU address bus
CPU address/data bus
CPU data bus
Ground
Power supply
CPU data bus
DTACK signal output
Serial data input
Ground
Power supply
Serial data output
Parallel data bus
Power supply
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
VSS
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
DB21
DB22
DB23
DB24
DB25
DB26
DB27
DB28
DB29
DB30
DB31
TIMO/DBOE
VSS
VDD
DA00
DA01
DA02
DA03
DA04
DA05
DA06
DA07
DA08
DA09
DA10
DA11
DA12
DA13
DA14
DA15
VSS
VDD
DA16
DA17
DA18
DA19
DA20
DA21
DA22
DA23
DA24
DA25
DA26
DA27
DA28
DA29
DA30
DA31
VDD
VSS
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15/RAS
A16/CAS
A17/CE
/WE
/OE
VDD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
Ground
Parallel data bus
Timing signal/Parallel data bus control
Ground
Power supply
External memory data bus
Ground
Power supply
External memory data bus
Power supply
Ground
External memory address bus
External memory address bus/Row address strobe
External memory address bus/Column address strobe
External memory address bus/Chip enable
External memory write enable
External memory output enable
Power supply
YSS228E-F (XQ962D00) DSP3 (Digital Signal Processor)
DM: IC14, 15
DG60-112
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