17
CLP-265GP
CONTENTS
●
(E-HOSTs) ...................................................... 17
●
(Digital to Analog Converter) ......................................... 17
●
.................................................................................. 18
●
........................................................ 19
●
................................................................ 19
■
LSI PIN DESCRIPTION
●
HD6433690B70FYV
(X6008200)
CPU
(E-HOSTs)
PIN
NO.
NAME
I/O
FUNCTION
PIN
NO.
NAME
I/O
FUNCTION
Analog Power Supply (+3.3V)
(Pull Up)
Sub Clock Output
- (NC)
Sub Clock Input
- (NC)
Internal Power Supply (+3.3V)
- (NC)
RESET input
- (NC)
TEST input
- (NC)
Ground
(Pull Up or Vcc)
Clock output
- (NC)
Clock input
- (NC)
Power supply
SCK3 (Main CPU)
- (NC)
RXD (Pull Up)
- (NC)
TXD (Main CPU)
Active Sensing ON/OFF
/IRQ0 (Main CPU)
- (NC)
- (NC)
- (NC)
- (NC)
- (NC)
- (NC)
- (NC)
Analog Controller (AN4)
- (NC)
Analog Controller (AN5)
/E-IC
Analog Controller (AN6)
SDA
Analog Controller (AN7)
SCL
Analog Controller (AN3)
- (NC)
Analog Controller (AN2)
- (NC)
Analog Controller (AN1)
- (NC)
Analog Controller (AN0)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
-
O
I
-
I
I
-
O
I
-
O
O
I
O
O
O
O
O
O
I/O
I/O
O
O
O
Avcc
X2
X1
Vcl
/RES
TEST
Vss
OSC2
OSC1
Vcc
P50
P51
P52
P53
P54
P55
P10
P11
P12
P56
P57
P74
P75
P76
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
/NMI
P80
P81
P82
P83
P84
P85
P86
P87
P20
P21
P22
P14
P15
P16
P17
PB4
PB5
PB6
PB7
PB3
PB2
PB1
PB0
I
O
O
O
O
O
I
O
O
O
I
O
I
O
O
O
I
I
I
I
I
I
I
I
●
AK4385ET
(X6040A00)
DAC
(Digital to Analog Converter)
PIN
NO.
NAME
I/O
FUNCTION
PIN
NO.
NAME
I/O
FUNCTION
1
MCLK
I
Master Clock
9
AOUTR-
O
Rch Analog out(-)
2
BICK
I
Audio Serial Data Clock
10
AOUTR+ O
Rch Analog out(+)
3
SDTI
I
Audio Serial Date Input
11
AOUTL-
O
Lch Analog out(-)
4
LRCK
I
L/R Clock
12
AOUTL+
O
Lch Analog out(+)
5
PDN
I
Power Down mode
13
Vss
-
Ground
6
CSN
I
Chip Select
14
VDD
-
Power Supply
7
CCLK
I
Control Data Input
15
DZFR
O
Rch Data Zero Input Detect
8
CDTI
I
Control Data Input
16
DZFL
O
Lch Data Zero Input Detect
Содержание Clavinova CLP-265GP
Страница 24: ...24 CLP 265GP GH3_EBUS L Circuit Board to GH3_EBUS M CN1 E E not installed not installed E E Component Side ...
Страница 25: ...25 CLP 265GP 2NAK8 V890460 1 F F F F Pattern Side ...
Страница 27: ...27 CLP 265GP 2NAK8 V890470 1 H H H H Pattern Side ...
Страница 28: ...28 CLP 265GP GH3_EBUS H Circuit Board not installed not installed I I to GH3_EBUS M CN4 I I Component Side ...
Страница 29: ...29 CLP 265GP 2NAK8 V890480 1 J J J J Pattern Side ...
Страница 35: ...35 CLP 265GP Pattern Side 2NA WB55420 3 ...
Страница 58: ...CLP 265GP 7 42 72 40 41 77 103 S06 S06 S06 S06 100 BottomView 22 22a 22b 22b 22c 22d Speaker Grille Assembly ...