12
AD9880 (AD9398) internal block diagram:
AD9880 (AD9398) instruction of the pin:
Pin Name Function
Pin Name
Function
2-9
GGE(0-7)
Switch output
44
RXC+
DVI digital video input
12-19 GBE(0-7)
Switch output
49
DDC_CLK
HDCP (serial data clock)
92-99 GRE(0-7)
Switch output
50
DDC_DATA
HDCP (serial data I/O)
20, 21 MCLK
Control clock output
51
MCL
HDCP control series data
clock
22
I2S_SCK
Audio series clock output
52
MDA
HDCP control series data
I/O
23
I2S_WS
Bus clock data output
82
SCL-1
Series data clock
27
I2S_SD
Bus audio data output
83
SDA_1
Series data I/O
34
RX0-
DVI digital video input
84
G_FIEL0
Parity field output
35
RX0+
DVI digital video input
85
G_VS
Vertical data sync output
37
RX1-
DVI digital video input
86
G_VHS
Green sync output
Содержание PH42T7
Страница 1: ...PDP TELEVISION PH42T7 ...
Страница 17: ...15 M52797 Internal block diagram The arrangement diagram of the pins ...
Страница 30: ...EXPLODED VIEW ...
Страница 58: ......
Страница 59: ......
Страница 60: ......
Страница 61: ......
Страница 62: ......
Страница 63: ......
Страница 64: ......
Страница 65: ......
Страница 66: ......
Страница 67: ......
Страница 68: ...603 PH42T7x xx America Ver 1 0 ...