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3.8.3.5. Digital Input – Timing
Typical measured input delay between Digital Input to FPGA Input
Measurements of input delays:
Edge Type Input Voltage [V] Typ. D elay [μs]
Rising 3.3 0.74
Rising 5 0.26
Rising 10 0.1
Rising 24 0.1
Falling 3.3 4.4
Falling 5 4.64
Falling 10 4.93
Falling 24 5.08
table 3-14, digital input, timing
Note:
• Measured at: Ambient Temperature 25°C
3.8.4. Optically isolated Digital Output
3.8.4.1. Optically isolated Digital Output – General info
Item Parameter / note
Maximal open circuit voltage 24V
Output port type Open collector NPN
Common pole Yes (OUT GND)
Protection Short-circuit / over-current / reverse voltage
Protection circuit PTC Resettable Fuse
Maximal sink current 36mA
Trip current 71mA – self restarting when failure mode current
disconnected
Inductive loads No
Effect of incorrect output terminal connection Protected against reverse voltage connection
Maximal output dropout 1V, sink current 25mA
Output delay ON->OFF 14.4µs (V
PULL-UP
=12V, R
PULL-UP
=5kOhm, T
AMBIENT
=25°C)
Output delay OFF->ON 2.68µs (V
PULL-UP
=12V, R
PULL-UP
=5kOhm, T
AMBIENT
=25°C)
Number of outputs 1
Strobe output mapping Yes
table 3-15, Optically isolated digital output, general info
3.8.4.2. Optically isolated Digital Output Delay
Output current OFF -> ON ON -> OFF Note
1mA 1.4 µs 14.1 µs V
OUTPUT
=5V, T
AMBIENT
=25°C
1mA 1.9 µs 25.3 µs V
OUTPUT
=10V, T
AMBIENT
=25°C
5mA 2.2 µs 9.2 µs V
OUTPUT
=5V, T
AMBIENT
=25°C
10mA 3.3 µs 11.5 µs V
OUTPUT
=10V, T
AMBIENT
=25°C
10mA 3.8 µs 12.8 µs V
OUTPUT
=12V, T
AMBIENT
=25°C
table 3-16, Optically isolated digital output delays
Note: Delays might be longer for higher voltage.