XFX GeForce 9300, Руководство пользователя

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Configuring the BIOS
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Memory Timings
This field has the capacity to automatically detect all of the
DRAM timing. If you set this field to [Manual], some fields will
appear and selectable.
CAS Latency (CL)
When the Memory Timings sets to [Manual], the field is
adjustable. This controls the CAS latency, which determines the
timing delay (in clock cycles) before SDRAM starts a read
command after receiving it.
tRCD
When the Memory Timings sets to [Manual], the field is
adjustable. When DRAM is refreshed, both rows and columns
are addressed separately. This setup item allows you to
determine the timing of the transition from RAS (row address
strobe) to CAS (column address strobe). The lower the clock
cycles, the faster the DRAM performance.
tRP
When the Memory Timings sets to [Manual], this field is
adjustable. This setting controls the number of cycles for
Row Address Strobe (RAS) to be allowed to precharge. If
insufficient time is allowed for the RAS to accumulate its
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