Xaoc Devices DREZNO Скачать руководство пользователя страница 2

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Drezno and Lipsk are the first in series of modules 
which constitute The Leibniz Binary Subsystem, a 
group of 8-bit signal processing devices offering 
comprehensive digital signal manipulation, as well 
as audio signal, control voltage, trigger, and gate 
generation. Drezno is the input/output front-end 
of the system, consisting of an analog–to–digital 
converter (ADC) and a digital–to–analog convert-
er (DAC), that alone can be used for manipulating 
analog signals and voltages based on their binary 
representation  (see:  ‘Binary  Code’  paragraph). 
Lipsk (sold separately) is a binary logic processing 
expander module that can flip (invert) individual 
bits of the digital signal representation. 

INStaLLatION

Drezno requires 12hp worth of free space in the eu-
rorack cabinet. The ribbon type power cable must 
be plugged into the bus board, paying close atten-
tion to polarity orientation. The red stripe indicates 
the negative 12V rail and should align with the dot, 
–12V, or red stripe marks on both the unit and 
the bus board. The module itself is secured against 
reversed power connection, however reversing the 
16-pin header 

may cause serious damage

 to oth-

er components of your system by short-circuiting the 
+12V and +5V power rails. There are two connection 
headers on the back PCB of Drezno for connecting 
Lipsk or more expansion modules to form an out-
in loop (see fig. 3). Lipsk requires 6hp of space, and 
must be connected to Drezno (and subsequent ex-
panders) using the 10-pin interconnector cable pro-
vided. Furthermore, Lipsk requires its own power ca-
ble to be connected to the bus board. Both modules 
should be fastened by mounting the supplied screws 
before powering up. To better understand these de-
vices, we strongly advise the user to read through the 
entire manual before using the modules.

bINaRy cODE

Binary  code  represents  voltage  values  using  pat-
terns of binary symbols (bits), each having one of 
two possible states: 0 or 1. These bits are organized 
into strings in order from most significant bit (b

N-1

to least significant bit (b

0

). For example, a 3-bit code 

can represent the values 0 (code 000), 1 (code 001), 
2 (code 010), 3 (code 011) ... up to 7 (code 111). In 
an 8-bit system, there are 256 possible values, from 
0  (code  00000000)  to  255  (code  11111111).  The 
most significant bit (b

7

) informs whether the signal 

value is in the top or bottom half of the range, and 
each subsequent bit describes the value in greater 
detail  (fig.  4  &  5).  In  an  8-bit  modular  synthesis 
system, the individual bits are represented as gate 
signals (binary 0=0V, binary 1=5V). Hence the in-
coming analog voltage is converted into eight gates. 

DREZNO cONtROLS aND OPERatION

Drezno consists of two sections (see fig. 1) that can 
act entirely independently or as a linked pair. The 
ADC input 

1

 expects either audio or CV signals. 

There are eight ADC gate outputs 

2

, represent-

ing each of the eight bits, 7 to 0. The illuminated 
gain 

3

 and offset 

4

 sliders allow the user to 

adapt the range of the signal fed to the A/D con-
verter. The sliders’ respective LEDs indicate signal 
amplitude  and  clipping.  The  A/D  converter  chip 
expects only positive voltages, so for bipolar input 
signals, set the 
offset slider to the upper position. 
The converter is internally clocked at a very high 
rate (near 2MHz) which helps to avoid aliasing for 
audio rate signals. The 
adc clock input 

5

 allows 

the user to override the internal clock by freezing 
the output code at the rising edge of the input sig-
nal (i.e. gate or trigger). Feeding a pulse wave into 
the 
adc clock allows the user to control the ADC 
sampling rate. ADC output activity is indicated by 
the corresponding set of eight yellow LEDs 

12

.

The DAC section mirrors the ADC section. There are 
eight DAC gate inputs 

6

, representing each of the 

eight bits numbered from 7 to 0. The dac output 

7

 produces a CV or audio signal based on the input 

code. The dac clock input 

8

 expects gate/trigger 

signals and is normalized to the ADC clock via the 
ribbon cable connected to the expander sockets on 
the back of the module (see fig. 3). Therefore, DAC 
clock can be replaced by a clock produced by an ex-
pander module, and it can be overridden by any sig-
nal patched into the panel socket. The DAC section 
also features 
gain 

9

 and offset 

10

 sliders which 

2

modules  

explained

Содержание DREZNO

Страница 1: ...DREZNO LIPSK the leibniz binary subsystem binary conversion komputor bit inversion commander Models of 1989 operator s manual rev 1989 1 0 ...

Страница 2: ...antbit b0 Forexample a3 bitcode can represent the values 0 code 000 1 code 001 2 code 010 3 code 011 up to 7 code 111 In an 8 bit system there are 256 possible values from 0 code 00000000 to 255 code 11111111 The most significant bit b7 informs whether the signal value is in the top or bottom half of the range and each subsequent bit describes the value in greater detail fig 4 5 In an 8 bit modula...

Страница 3: ...3 fig 1 front panel overview 5 12 8 1 7 2 6 3 9 4 10 11 ...

Страница 4: ...ing any of combination of its eight illuminated buttons 13 or it can be automated by patching gate signals into its gate input sockets 14 An active 5V gate flips the state of the respective bit If the button is active bit already flipped then the gate flips the bit again yielding double inversion no inversion The corresponding LEDs show the combined effect of both manual and gate actions The bit p...

Страница 5: ...hefrequencyofthein putaboveit resultinginextremelyfastwaveformsat the least significant bit 0 note only input signals with linear slopes like a sawtooth or triangle yield uniformrectangularsignalsatthebinaryoutputs Interesting waveshapes can be created at the DAC outputbyfeedingthebinaryDACinputswithvarious combinations of gate signals e g taken from binary counters frequency dividers or free runn...

Страница 6: ...result of inverting the most significant bit 7 only gate signals at individual bit outputs gate signals at individual bit outputs gate signals at individual bit outputs result of leaving only the most significant bit 7 waveform obtained by inverting all bits inversion of bit 4 and omission of bit 7 replacement of bit 6 with square waveform of the same freqency as the DAC clock signal 7 6 5 4 7 6 5...

Страница 7: ...it 6 7 6 5 4 7 6 5 4 7 6 5 4 7 6 5 4 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 5 0 5 5 0 5 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 fig 4 input sinusoidal signal and individual binary gates fig 5 input sawtooth signal and individual binary gates ...

Страница 8: ...ATED ON A RETURN TO FACTORY BASIS THIS WARRANTY DOES NOT COVER ANY PROBLEMS RESULTING FROM DAMAGES DURING SHIPPING INCORRECT INSTAL LATION OR POWER SUPPLY IMPROPER WORKING ENVIRONMENT ABUSIVE TREATMENT OR ANY OTHER OBVIOUS USER INFLICTED FAULT LEGACY SUPPORT IF SOMETHING WENT WRONG WITH A XAOC PRODUCT AFTER THE WARRANTY PERIOD IS OVER NO NEED TO WORRY AS WE RE STILL HAPPY TO HELP THIS APPLIES TO A...

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