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WRS PAK68/3 Скачать руководство пользователя страница 18

4.4 Clock Buffering

– Part 2

Page 17 PAK68/3

This has, however, changed with the second edition of the PAK
board (A layout) as appropriate components are provided in the
layout.
The clock buffering therefore always consists of a buffer or
amplifier circuit of the clock signal source and the termination of
the clock line on the PAK. Furthermore, the presence and
version of a FRAK/? plays a role since on the FRAK/? the clock
buffering is already done. But in any case the clock line on the
PAK has to be terminated. An overview:



WITHOUT FRAK/?



without clock buffering (max. 32MHZ, no FPU)

Close the

bridge between R47 and the quartz oscillator with some
solder



with clock buffering (from 32MHz and/or with FPU)

Leave solder bridge between R47 and quartz oscillator
open; place a 74F00 on the solder side (!) under the quartz
oscillator U23; R47=10 ohm (instead of 33 ohm); series
circuit of 68 ohm resistor and 220pF capacitor from U1 Pin
1 to U5 Pin 12; alternatively use R48=68 ohm, C43=220pF
(A-Layout)



WITH FRAK/1



Termination of the clock line on the PAK

series circuit of 68 ohm resistor and 220pF capacitor from U1
Pin 1 to U5 Pin 12; alternatively use R48=68 ohm,
C43=220pF (A-Layout)



WITH FRAK/2



Termination of the clock line on the PAK

100 ohm resistor from U1 Pin 1 to U5 Pin 12

The  above  values  of  the  analog  components  are  standard
values.  It  may  be  necessary  to  adjust  them  slightly,  but  this  is
only  possible  with  relatively  serious  measuring  equipment  (at
least  100MHz  oscilloscope)  and  quite  a  lot  of  expertise.
However, an adjustment should be so rare that we do not want
to get into the details here.

4.5 PAK and 68000: Alternate Operating Mode

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Содержание PAK68/3

Страница 1: ...Processor Replacement Card Version 3 CPU Accelerator for the Atari ST E Series 2003 WRS Software Design Humboldtstrasse 12 45886 Gelsenkirchen ...

Страница 2: ...nn R Skuplik GbR Humboldtstrasse 12 45886 Gelsenkirchen TEL 0209 87 30 01 FAX 0209 87 30 02 E Mail info wrsonline de WWW http www wrsonline de Documentation R Skuplik H Zimmermann 2nd Edition from 01 11 2000 Limitation of Liability We reserve the right to make changes to the hardware the GAL equations or the documentation withhout restriction We are not responsible for the accuracy of the manual o...

Страница 3: ...inboard 8 3 2 Preparing the PAK 11 3 3 Installing the PAK 12 3 4 Initial Testing 12 4 Configuring the PAK68 3 13 4 1 The GAL Set 13 4 2 The Jumpers 14 4 3 The TOS 15 4 4 Clock Buffering Part 2 16 4 5 PAK and 68000 Alternate Operating Mode 17 4 6 PAK with Mainboard Clock Greater Than 8MHz 18 4 7 PAK and PuPla 19 5 Troubleshooting 19 5 1 Startup Problems 20 5 2 Stability Problems 20 5 3 DMA Floppy P...

Страница 4: ... with the construction and installation of circuit boards The construction and installation of the PAK68 3 as well as changes to your computer are performed at your own risk The PAK68 3 was first introduced in the magazine c t If you would like to read the articles they were in the 11 93 issue page 222 and the 12 93 issue page 276 1 2 Delivery Options The PAK68 3 is available in three versions eac...

Страница 5: ...e operation of the PAK Incidentally the PAK offers the speed benefits of the blitter anyway since it overtakes the performance of the blitter from 32MHz onwards For the proper operation of the PAK a patched TOS 3 06 is necessary in EPROMs located on the PAK board Without this PAK TOS if the PAK runs at all it is very limited because the PMMU of the 68030 is not initialized The mainboard RAM should...

Страница 6: ...f the PAK68 3 030 68030 processor 32 bit instruction and data cache on chip PMMU 68881 882 FPU optional 32KB second level cache optional 32 50 MHz clock frequency EPROMs with a custom TOS 3 06 on the PAK optional Switchover mode to operate with a 68000 CPU optional High compatibility with Atari mainboards and other hardware through a clean bus interface the PAK even runs on 68000 based Macintosh s...

Страница 7: ...well as some standard components being changed So you can save time with a little extra effort and consideration Though you can always retrofit or remove the clock buffering later it s just extra work that can be avoided To help you make the decision here is an overview of the possibilities No Clock Buffering This really only makes sense if you intend to install a FRAK in the near future since the...

Страница 8: ...capacitors and the resistor network Then solder the 74F86 the four cache SRAMs and the 16V8 GAL P3 PUK A directly to the board without socket Now place the IC sockets and the IC plug adapter pins using a 64 pin socket below these can serve as a positioning aid The board edge pads of the two 64 pin SIL rows are for one socket of the PAK U7 i e for a 68000 and the board center pads are for the IC ad...

Страница 9: ... socketed now is the time to do it The best way to do this is to use a fine side cutter and snip the CPU pins close to the mainboard This renders the CPU unusable but a new CPU costs just 10 DM A new mainboard would be much more expensive if you were to require one After snipping the pins you can simply hold each pin remaining in the mainboard with some tweezers and easily unsolder them Then clean...

Страница 10: ...anyway from 32MHz onwards So if you do decide to remove the blitter please do not forget the two solder bridges so the computer doesn t hang the next time you turn it on So that there are no problems with the mainboard RAM it should have a max access time of 100ns Unfortunately there are configurations with 120ns or even 150ns If that is the case there will certainly be problems If you are unlucky...

Страница 11: ...he data and address busses are 10k ohm If you know how and where to change them we recommend 4 7k ohm for the data bus and 3 3k ohm for the address bus When you are modifying and testing the computer the clacking sound will get on your nerves if you have forgotten to connect the keyboard popular case with MegaST Here is a tip on how to change that The problem is that Atari has placed a pull down r...

Страница 12: ... jumper assignments can be found in Chapter 4 2 A tip in this context If you have a FRAK and want to easily access J4 SLC or J5 PAK Enable because the FRAK sits above the PAK and therefore there is no access to put remove the jumpers you should extend the jumper with an additional 2 pin post and some wiring on the solder side Then fix it to the edge of the board with for example hot glue This make...

Страница 13: ...he power supply There should be an Atari logo in the upper left corner of the screen If there is still no Atari logo after 10 seconds switch off the power supply to avoid damaging any components in case there are any problems with the construction of the PAK If the screen remains completely black then immediately turn off the power supply and check if any components have become very hot If this is...

Страница 14: ...of the PAK GALs If you cannot program GALs yourself you can obtain programmed GAL sets from us The JEDEC files of the current GAL equations for our projects can be found on our website www wrsonline de or on the inlcuded disk in the file WRSGAL LZH At the time of printing the following GALs are up to date for the PAK U1 P13 50d U2 P2 ST U4 V4 50ac U5 V5 51a U6 P6 ST without FRAK P6 F05 with FRAK D...

Страница 15: ...pped J7 ROM 1 2 ROM on the PAK active 2 3 inactive or not available J8 ROM_CS 1 2 ROMCS to GND for faster access 2 3 ROMCS connected to ROMOE J9 CPUCLK 1 2 asynchronous clock i e from FRAK 2 3 synchronous 16MHz clock NOT with FRAK J10 FPUCLK 1 2 asynchronous clock like CPU 2 3 synchronous 16MHz clock the FPU should not run slower than the CPU J11 Cache Control 1 2 via MMU 2 3 reserved not used ope...

Страница 16: ...is TT TOS would work on the PAK So began PAK TOS a patched version of TOS 3 06 used on the TT Unfortunately due to licensing reasons we cannot offer a ready made version of this PAK TOS as TOS is still under the copyright of Atari or whatever is left of it So we offer the program TOS Patch with which you can see the changes to the TOS versions regardless of the TOS binary file itself Anyone can us...

Страница 17: ...k drivers will not work properly Memory protection is not possible 4 4 Clock Buffering Part 2 The 68030 processor is very sensitive as far as the quality of the clock signal is concerned If the clock is not clean there can be relatively bad consequences With crashes caused by a dirty clock DMA problems and problems accessing the mainboard have been observed In the most extreme cases the computer d...

Страница 18: ...e between R47 and quartz oscillator open place a 74F00 on the solder side under the quartz oscillator U23 R47 10 ohm instead of 33 ohm series circuit of 68 ohm resistor and 220pF capacitor from U1 Pin 1 to U5 Pin 12 alternatively use R48 68 ohm C43 220pF A Layout WITH FRAK 1 Termination of the clock line on the PAK series circuit of 68 ohm resistor and 220pF capacitor from U1 Pin 1 to U5 Pin 12 al...

Страница 19: ... never change This completes all modifications Owners of the older PAK layout have to use version P3 PUK and unfortunately re wire 8 lines by hand 1 BG_68K Pin 11 U7 to Pin 9 PUK GAL 2 BR_68K Pin 13 U7 to Pin 13 PUK GAL 3 E_68K Pin 20 U7 to Pin 6 PUK GAL 4 BG_PAK Pin 11 CON2 to Pin 12 PUK GAL 5 BR_PAK Pin 13 CON2 to Pin 8 PUK GAL 6 E_PAK Pin 20 CON2 to Pin 15 PUK GAL 7 PAK_EN Pin 2 J5 to Pin 2 PUK...

Страница 20: ...d can ever make up for 4 7 PAK and PuPla We should briefly mention a very important extension to the PAK here the buffer board PuPla Now available in the second version PuPla 2 this extension is an important tool to solve a variety of mainboard related issues The PuPla 2 even helps with frequent FPU errors The essential function of the buffer board is to disconnect the PAK bus from the mainboard b...

Страница 21: ...older bridge closed An additional pull up resistor may be required on the reset line as it tends to oscillate especially at higher clock speeds Solder a 1k ohm resistor from CON2 Pin 18 to CON2 Pin 14 preferably on the component side of the PAK Alternatively 1k SMD resistor and wire pieces from Vcc pin of the F86 to CON2 Pin 18 on the solder side of the PAK With FRAK F541 driver on it Power connec...

Страница 22: ... is a 33MHz CPU operating at 40MHz In the long run cooling doesn t really help just don t overclock The manufacturer has their reasons if there is a maximum clock on a component If a FRAK is in operation there may be problems if the RAM on the FRAK is not fast enough for the clock frequency used on the PAK See the FRAK manual Sometimes there may be problems with the burst mode Just turn off the bu...

Страница 23: ...e A is physically write protected which wasn t actually true If you switch off all caches CPU internal and SLC disk accesses are almost normal These problems can be attributed to incorrect handling of the DMA chip which Atari does wrong in TOS itself unlike Atari s own recommendation In most cases patching the operating system fixes these errors The current version of PAK TOS G3 aready has this pa...

Страница 24: ...only recourse is to remove the extension or get a faster GAL from the manufacturer Some IDE adapters can also cause problems usually due to poor timing of GALs that are too slow Unfortunately nothing can help with these extensions other than removing them and choosing instead the better SCSI system Some graphics adapters may cause problems with the PAK Again in the end the solution is usually to c...

Страница 25: ...Appendix A Component Layout PAK68 3 Page 24 Appendix A Component Layout ...

Страница 26: ...23 1 Quartz Oscillator 32 50MHz RN1 1 Resistor Network 4 7k ohm x8 Array R1 R4 R7 R10 R23 R26 8 Resistor 4 7k R2 R5 R6 3 Resistor 1k R8 1 Resistor 2 2k R31 R32 2 Resistor 330 ohm R41 R43 2 Resistor 560 ohm R42 1 Resistor 10k R44 R47 4 Resistor 33 ohm C1 C16 16 Ceramic Capacitor 100nF 2 54mm C20 C24 5 Tantalum Capacitor 10uF 16V 2 54mm C41 C42 2 Ceramic Capacitor 22pF 2 54mm J1 J6 6 Pin Header 2pin...

Страница 27: ...rd next to the 68000 socket new jumper J12 for test purposes only Flash ROM Do not populate the PUK GAL U3 is already fully wired but with a different pin configuration P3 PUK A optional clock buffering see Chapter 4 4 Appendix C TOS ROM Table Byte assignment for a TOS longword Bit TT PAK68 3 PAK68 2 WRS D24 D31 EE U10 U11 HIH D16 D23 OE U11 U10 HIL D8 D15 EO U12 U9 LOH D0 D7 OO U13 U8 LOL ...

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