WM8778-EV1M
w
Rev 1.1, February 2004
41
EXTERNAL DSP CONNECTION TO THE WM8778-EV1B
The WM8778-EV1B evaluation board has been designed to allow it to be easily connected to
an external DSP platform with error free operation.
The following information is provided to ease the connection process and ensure that all
signals sent and received by the WM8778-EV1B are reliable and at the correct voltage
levels.
AUDIO INTERFACE CONNECTIONS
It is recommended that twisted pair (signal twisted with GND) or shielded wires are used to
make the audio interface connections between the DSP and WM8778-EV1B platforms. This
is to ensure that no interference or noise is picked up by the clocks or data lines, thus
reducing performance and reliability.
When the WM8778 is set in
Slave Mode
(both DAC and ADC), the jumpers on header H1
should be removed, disconnecting the digital input section of the evaluation board. The
audio interface timing and data signals from the DSP platform should then be connected as
shown in Figure 25 Connections from DSP Platform. The signals should be connected to H1
and not on the header strip H3 running up each side of the device. Connecting the signals on
the output side of the level-shift IC (U5) will cause drive contention between U5 and the DSP
and could result in damage to either or both devices. In most cases, the DSP supplies will be
set around 3V for low power portable applications. The inputs to the level-shift IC
(74ALVC164245) have a TTL threshold (i.e. Logic High = +2V(min); Logic Low = +0.8V(max))
and low input current requirements (i.e. 15uA max) allowing most DSP's to connect directly.
Figure 25 Connections from DSP Platform
The digital inputs to the WM8778 have a CMOS threshold (i.e. Logic High (min) = DVDDx0.7;
Logic Low (max) = DVDDx0.3). These are met directly by the level shift IC outputs.
The jumpers on H2 should also be removed, disconnecting the digital output section (ADC)
of the WM8778 evaluation board. The DOUT data from the WM8778 should then be
connected to the DSP via pin 10 of header strip H3 and the GND connection should be taken
from pin 12 of header strip H3.
The DOUT signal should be taken direct from the WM8778 digital output (H3) as the output
side of the level-shift IC (U5) from the WM8778 is pulled up to +5V which may overdrive and
cause damage to the DSP inputs. The digital output levels of the WM8778 are Logic High
(min) = DVDDx0.9; Logic Low (max) = DVDDx0.1 which should meet the input level
requirements of most DSPs running at +3V supplies. If the DSP is running with +5V supplies
then the connections to it should be made from the output side of the level-shift IC (U5),
connecting the signals as shown in Figure 26 Data Connection to the DSP Platform (+5V
tolerant input levels).
Содержание WM8778-EV1B
Страница 1: ...WM8778 EV1B Evaluation Board User Handbook Rev 1 1...
Страница 25: ...WM8778 EV1M w Rev 1 1 February 2004 25 SCHEMATIC LAYOUT Figure 13 Functional Diagram...
Страница 26: ...WM8778 EV1M w Rev 1 1 February 2004 26 Figure 14 Digital Input...
Страница 27: ...WM8778 EV1M w Rev 1 1 February 2004 27 Figure 15 Software Control...
Страница 28: ...WM8778 EV1M w Rev 1 1 February 2004 28 Figure 16 Level Shift...
Страница 29: ...WM8778 EV1M w Rev 1 1 February 2004 29 Figure 17 Analogue Input and Output Mute...
Страница 30: ...WM8778 EV1M w Rev 1 1 February 2004 30 Figure 18 WM8778...
Страница 31: ...WM8778 EV1M w Rev 1 1 February 2004 31 Figure 19 Analogue Output...
Страница 32: ...WM8778 EV1M w Rev 1 1 February 2004 32 Figure 20 Power...
Страница 33: ...WM8778 EV1M w Rev 1 1 February 2004 33 WM8778 EV1B PCB LAYOUT Figure 21 Top Layer Silkscreen...
Страница 34: ...WM8778 EV1M w Rev 1 1 February 2004 34 Figure 22 Top Layer...
Страница 35: ...WM8778 EV1M w Rev 1 1 February 2004 35 Figure 23 Bottom Layer...
Страница 36: ...WM8778 EV1M w Rev 1 1 February 2004 36 Figure 24 Bottom Layer Silkscreen...
