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Wiznet WIZ610io, Руководство пользователя

Wiznet WIZ610io - высококачественный преобразователь интерфейсов Ethernet в последовательный порт. Для вашего удобства, мы предлагаем бесплатное скачивание Руководства пользователя с нашего веб-сайта. Получите подробную информацию о продукте и его настройках, загрузив руководство с нашего сайта.

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WIZ610io User Manual (WIZnet Co.,Ltd.) 

1 

 

 

WIZ610io User Manual 

(Version 1.1) 

 

 

 

 

 
 

 

© 2019 WIZnet Co.,Ltd. All Rights Reserved. 

☞

 For more information, visit our website at 

http://www.wiznet.io

 

Содержание WIZ610io

Страница 1: ...WIZ610io User Manual WIZnet Co Ltd 1 WIZ610io User Manual Version 1 1 2019 WIZnet Co Ltd All Rights Reserved For more information visit our website at http www wiznet io...

Страница 2: ...WIZ610io User Manual WIZnet Co Ltd 2 Document Revision History Date Revision Changes 2019 02 18 V1 0 Official Release 2019 05 30 V1 1 Verify modification Add IO Module Carrier Board Description...

Страница 3: ...ormer 1 1 Feature Support Hardwired TCP IP Protocols TCP UDP IPv6 IPv4 ICMPv6 ICMPv4 IGMP MLDv1 ARP PPPoE Support IPv4 IPv6 Dual Stack Support 8 independent SOCKETs simultaneously with 32KB Memory Sup...

Страница 4: ...WIZ610io User Manual WIZnet Co Ltd 4 2 Pin assignment description 2 1 WIZ610io Pin assignment TOP side view Pin assignment...

Страница 5: ...Low This pin is used to SPI Slave Select signal Pin when using SPI interface 6 O INTn Interrupt Active low When the event occur during W6100 Ethernet Communication INTn notices to HOST Low Interrupt...

Страница 6: ...view 3 WIZ610io SPI operations WIZ610io is controlled by a set of instruction that is sent from a external host commonly referred to as the SPI Master The SPI Master communicates with W6100 via the SP...

Страница 7: ...nd always output on the falling edge of SCLK 3 1 Process of using general SPI Master device 1 Configure Input Output direction on SPI Master Device pins 2 Configure SCSn as High on inactive 3 Write ta...

Страница 8: ...MISO are synchronized to SCLK Falling Edge If more than one byte of data is transmitted continuously it supports sequential data write Read Sequence uint8_t tAD 3 send buffer Address tAD 0 uint8_t Add...

Страница 9: ...to indicate VDM The data bits transmitted through MOSI are synchronized to the SCLK Falling Edge If more than one byte of data is transmitted continuously it supports sequential data write Write Sequ...

Страница 10: ...nRST TPL TRC PLOCK Internal Symbol Description Min Typ Max TRC Reset Time 350ns 580ns 1 0us TPL Stable Time 60 3ms 4 2 SPI Timing wizchip_spi_write_buf tAD 3 write data for idx 0 idx len idx Write da...

Страница 11: ...Min Max Units FSCK SClK Clock Frequency 70 MHz TCSS CSn Setup Time 3 SYS_CLK ns TCSH CSn Hold Time 2 SYS_CLK ns TCS CSn High Time 2 SYS_CLK ns TWH SCLK High time 3 ns TWL SCLK Low Time 3 ns TDS Data...

Страница 12: ...WIZ610io User Manual WIZnet Co Ltd 12 6 Reference Schematics 6 1 1 WIZ610IO Schematics...

Страница 13: ...WIZ610io User Manual WIZnet Co Ltd 13 6 1 2 WIZ610IO Part List...

Страница 14: ...WIZ610io User Manual WIZnet Co Ltd 14 6 2 1 IO Module Carrier Board Schematics...

Страница 15: ...WIZ610io User Manual WIZnet Co Ltd 15 6 2 2 IO Module Carrier Board Part List...

Страница 16: ...o defects which occur during normal use and does not extend to damage to products or parts which results from alternation repair modification faulty installation or service by anyone other than someon...

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