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1. REVISION HISTORY
Date
Page
Contents
Version
2006/08/15
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Preliminary
Preliminary 0.0
Страница 1: ...1 UG 6028GDEBF02 Evaluation Kit User Guide ...
Страница 2: ...0 Series MPU parallel Interface 6 4 2 6800 Series MPU parallel Interface 7 4 3 SPI Interface 8 5 EVK use introduction 9 6 Power down and Power up Sequence 11 7 How to use SEPS525F module 12 7 1 Initial Step Flow 12 7 2 RD recommend Initial Code for 80 Interface 13 7 2 1 Sub Function for 80 Interface 15 ...
Страница 3: ...3 1 REVISION HISTORY Date Page Contents Version 2006 08 15 Preliminary Preliminary 0 0 ...
Страница 4: ...4 2 EVK Schematic Note The schematic is already remove R3 and D1 VSDH connect to GND ...
Страница 5: ... RDB For an 80 system bus interface read strobe signal active low For For an 68 system bus interface bus enable strobe active high When using SPI fix it to VDD or VSS level WRB For an 80 system bus interface write strobe signal active low For an 68 system bus interface read write select Low Write High Read When using SPI fix it to VDD or VSS level RESB Reset SEPS525F active low HV External Column ...
Страница 6: ...6 4 TIMMING CHARACTERISTICS 4 1 80 Series MPU parallel Interface Figure 1 80 Series MPU 8 bit parallel Interface Timing Diagram Table 1 80 Series MPU 8 bit parallel Interface Timing Characteristics ...
Страница 7: ...7 4 2 6800 Series MPU parallel Interface Figure 2 68 Series MPU 8 bit parallel Interface Timing Diagram Table 2 68 Series MPU 8 bit parallel Interface Timing Characteristics ...
Страница 8: ...8 4 3 SPI Interface Figure 3 Serial peripheral interface Timing Diagram Table 3 Serial peripheral interface Timing Characteristics ...
Страница 9: ...9 5 EVK use introduction Figure 4 EVK PCB and OLED Module Figure5 The combination of the module and EVK Interface select Push here to lock module ...
Страница 10: ...e 4 and Figure5 User can use leading wire to connect EVK with customer s system The example shows as Figure 6 Fig 6 EVK with test platform Note 1 It is the external most positive voltage supply In this sample is connected to power supply Note 2 The leading wire has 14 pins totally in this case D17 D9 RDB RS WRB RESB CSB Note 3 If used RGB Interface please connected to platform Note 1 Note 2 Note 3...
Страница 11: ...ion Power up Sequence 1 Power up VDD 2 Send Display off command 3 Driver IC Initial Setting 4 Clear Screen 5 Power up VDDH 6 Delay 100ms when VDD is stable 7 Send Display on command Power down Sequence 1 Send Display off command 2 Power down VDDH 3 Delay 100ms when VDDH is reach 0 and panel is completely discharges 4 Power down VDD D Di is sp pl la ay y o on n VDD V VD DD D o on n V VC CC C o on n...
Страница 12: ...12 Suggest all register set again 7 How to use SEPS525F module 7 1 Initial Step Flow Driver IC Initial Code Reset Driver IC Display on VDD ON VDDH ON Wait 1ms Wait 1ms Clear RAM Start Dispaly Wait 1ms ...
Страница 13: ...e_Command rPRECHARGE_TIME_R 0x03 Reg 09h Action set color G precharge time Write_Command rPRECHARGE_TIME_G 0x05 Reg 0Ah Action set color B precharge tiem Write_Command rPRECHARGE_TIME_B 0x05 Reg 0Bh Action set color R precharge current Write_Command rPRECHARGE_Current_R 0x0a Reg 0Ch Action set color G precharge current Write_Command rPRECHARGE_Current_G 0x0a Reg 0Dh Action set color B precharge cu...
Страница 14: ... Action Display start line Write_Command rDSL 0x00 Reg 2Eh Action Display First screen X start point Write_Command rD1_DDRAM_FAC 0x00 Reg 2Fh Action Display First screen Y start point Write_Command rD1_DDRAM_FAR 0x00 Reg 31h Action Display Second screen X start point Write_Command rD2_DDRAM_SAR 0x00 Reg 32h Action Display Second screen Y start point Write_Command rD2_DDRAM_SAR 0x00 Reg 33h Action ...
Страница 15: ...IOSET nWR IOSET nCS void Write_Command unsigned char Reg unsigned char data Write_Register Reg Write_Parameter data void Write_6BitDDRAM unsigned char data IOCLR 0x0000000ff reset D0 D7 IOSET bRS IOCLR nCS IOCLR nWR IOSET data 2 Send R5 R0 G5 G0 or B5 B0 to D17 D12 IOSET nWR IOSET nCS void fill_block unsigned char R unsigned char G unsigned char B unsigned char i j Write_Register rDDRAM_DATA_ACCES...
Страница 16: ...fill_block 0x00 0x3f 0x00 void ColorB void fill_block 0x00 0x00 0x3f void ColorW void fill_block 0x3f 0x3f 0x3f void Clear_DDRAM void fill_block 0x00 0x00 0x00 RD recommend Initial Code and Sub Function Note 1 For 80 series CPU interface 2 For 6bits DDRAM transfer ...
