PCM-C418/BIOS Supplemental
v1.0
www.winsystems.com
Page 40
Advanced > Chipset Settings - NorthBridge Configuration - CPU Configuration
Manufacturer
DMP
Brand String
DMP (R) A9126
Frequency
1.00GHz
L1 Cache
[Enabled]
Cache L1
16 KB
L2 Cache
[Enabled]
L2 Cache Method
[Write Back]
Cache L2
256 KB
CPU Fast Decode
[Normal]
CPU Pipeline-write
[Enabled]
DRAM Refresh Rate Double
[Double Refresh Rate]
MSR CFCFCF00 00:07
[FE]
MSR CFCFCF00 08:15
[F0]
MSR CFCFCF00 16:23
[55]
MSR CFCFCF00 24:31
[F7]
MSR CFCFCF00 32;39
[0]
MSR CFCFCF00 40:47
[5F]
MSR CFCFCF00 48:55
[8]
MSR CFCFCF00 56:63
[0]
Advanced > Chipset Settings - NorthBridge Configuration - DRAM Configuration
DDR Setting By
[BIOS]
DDR PHY Control Setting By
[BIOS]
Enhanced RWP Policy
[Disabled]
NB Function 1 Register BC
[0]
NB Function 1 Register BD
[0]
NB Function 1 Register BE 0:3
[0]
Advanced > Chipset Settings - NorthBridge Configuration - VGA Configuration
LCD Panel Index
[3]
LCD Backlight
[Disabled]
GPU Frame Buffer Mapping
[Enabled]
GPU Frame Buffer R/W Reorder
[Enabled]
Advanced > Chipset Settings - NorthBridge Configuration - MISC Configuration
PCI Read CMD Select
[MRL like MR]
NB Function 0 Register F9
[5D]
PCI Prefetch Read Disable
[No]
PCI Master Burst Write Length
[3]
PCI Delay Line
[4]