WinSystems PCM-AIO, Руководство по эксплуатации, Страница: 6 / 43

1.2.3
Starting an A/D conversion
The con ver sion is be gun by writ ing a word to the con trol reg is ter to se lect the chan nel
and spec ify if it is single- ended/dif fer en tial and uni po lar/bi po lar. Out put data is latched
and the PCM- AIO sig nals the base board that con ver sion is com plete and data is avail able.
This board sets a Busy flag for use in a polled mode and can gen er ate an in ter rupt af ter each
com pleted con ver sion.
1.2.4
A/D Input Configuration
All in put chan nel are wired to J1, a 26- pin right an gle male con nec tor. It has the same
pin- out as Win Sys tems' MCM/LPM-A/D12. J1 is con fig ured so that mass ter mi na tion type
flat rib bon ca ble or dis creet wires can be con nected to it. Win Sys tems of fers the CBL- 120-3
which is a 3 foot, #28 AWG, rib bon ca ble de signed to pro vide ac cess to sig nals from the 26-
pin, 0.100 “ grid con nec tor on the PCM- AIO board. One end of the ca ble has a po lar ized, 26-
pin fe male socket con nec tor with strain re lief that plugs into the board and the other end is
open to al low us ers to make their own cus tom ter mi na tion. The CBL- 130-4 is a 4 foot, rib -
bon ca ble that will con nect the PCM- AIO to the Analog- ADP. This board is a non- isolated
sig nal con di tioner and ter mi na tion panel.
1.2.5
Digital to Analog Converter
The PCM- AIO has two 12 bit digi tal to ana log con ver tor chan nels. Each chan nel can be
con fig ured for ei ther a uni po lar or bi po lar out put with one of two out put ranges: 0 to 5V or
+/-5V. The D/A sec tion on the PCM- AIO takes 4 I/O ports.
1.2.6
D/A Operation
Each D/A chan nel on the PCM- AIO is re set to logic zero af ter a sys tem re set. To out put
a digi tal word to a chan nel, the low byte is writ ten to the low byte ad dress (AL WAYS
EVEN), the up per 4 bits of the 12 bit word is writ ten to the next ad dress (AL WAYS ODD).
Af ter writ ing the up per 4 bits, the chan nel is auto mati cally up dated. It is im por tant to note
that a chan nel is only up dated when the up per 4 bits are writ ten to the odd ad dress.
EX AM PLE: 0 to 5V uni po lar out put se lected
D/A Ports are lo cated at 100- 10B
To Out put 800 HEX to chan nel 0 (should equal 2.5V out put)
1. Out puT 00 HEX TO I/O PORT 108 HEX
2. Out put 08 HEX TO I/O PORT 109 HEX
When the 08 hex is writ ten to I/O Port 101, the 12 bit word will be con verted to a 2.5V
out put.
Page 1-2 OPERATIONS MANUAL PCM-AIO 980723
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