ATA Command Set
WD RE3 XL333M
34
RELEASED 11/13/08 (WD CONFIDENTIAL)
2679-701179-A01
53
Additional Words Valid
Bit 15-8: Free-fall Control Sensitivity
00h = Vendor’s recommended setting
01h-FFh = Sensitivity level. A larger number is a more sensitive
setting.
Bit 7-3: Reserved
Bit 2: 1 = the fields reported in word 88 are valid
0 = the fields reported in word 88 are not valid
Bit 1: 1 = the fields reported in words (64-70) are valid
0 = the fields reported in words (64-70) are not valid
Bit 0: Obsolete
0007h
54-58
Obsolete
0
59
Current Blocking Factor
Bit 15-9: Reserved
Bit 8: If set, Multiple sector setting is valid
Bit 7-0: Current setting for number of logical sectors that shall
be transferred per DRQ data block on READ/WRITE Multiple
commands
0XXh
60-61
Total number of user addressable logical sectors (Dword)
XXXXh
62
Obsolete
0
63
Multi-Word DMA Transfer Mode Supported
Bit 15-11: Reserved
Bit 10: If set, Multiword DMA mode 2 is selected
Bit 9: If set, Multiword DMA mode 1 is selected
Bit 8: If set, Multiword DMA mode 0 is selected
Bits 0-7: Multiword DMA mode 2 and below are supported
XX07h
64
Advanced PIO Modes Supported
Bit 15-8: Reserved
Bits 7-0: PIO Modes supported
0003h
65
Min. Multi-Word DMA Transfer Cycle Time per word (ns)
120
66
Manufacturer Recommended Multi-Word DMA Cycle Time (ns)
120
67
Min. PIO Transfer Cycle Time without flow control (ns)
120
68
Min. PIO Transfer Cycle Time with flow control (ns)
120
69-70
Reserved
0
71-74
Reserved for the IDENTIFY PACKET DEVICE command.
0
75
Queue Depth
Bit 15-5: Reserved
Bit 4-0: Maximum queue depth - 1
001F
76
Serial ATA Capabilities
Bit 15-13: Reserved
Bit 12: Supports Native Command Queuing priority
information
Bit 11: Supports Unload while NCQ commands outstanding
Bit 10: Supports Phy event counters
Bit 9: Supports receipt of host-initiated interface power
management requests
Bit 8: Supports Native Command Queuing
Bit 7-3: Reserved for future Serial ATA signaling speed grades
Bit 2: 1 = Supports SATA Gen2 signaling speed (3.0 Gb/s)
Bit 1: 1 = Supports SATA Gen1 signaling speed (1.5 Gbps)
Bit 0: Shall be cleared to zero
0000011100000110b
77
Reserved for Serial ATA
0
78
Serial ATA Features Supported
Bit 15-7: Reserved for Serial ATA
Bit 6: If set, device supports software settings preservation
Bit 5: Reserved for Serial ATA
Bit 4: If set, device supports in-order data delivery
Bit 3: If set, device supports initiating power management.
Bit 2: If set, device supports DMA Setup auto-activateion
Bit 1: If set, device supports non-zero buffer offsets
Bit 0: Cleared to 0
0000000001000100b
WORD
FIELD DESCRIPTION
VALUE