WD Scorpio ML160M
Specifications
2679-701205-A00
RELEASED 1/16/09 (WD CONFIDENTIAL)
11
2.7
Interface Connector Pin Assignments
The WD Scorpio interfaces with the host I/O bus via the 44-pin connector (J2) illustrated in
Figure 2-5. Table 2-2 identifies the pin numbers of the J2 connector and the corresponding
signal names and signal functions.
Figure 2-5. Standard Factory Connectors
Table 2-2. Device Pin Connector Pin Definitions
PIN
MNEMONIC
I/O
DESCRIPTION
1
RESET-
I
Host Reset
Initializes the WD Scorpio drive when asserted.
3, 5, 7,
9, 11
13, 15.
17
4, 6, 8,
10, 12,
14, 16,
18
DD7-DD0
DD8-DD15
I/O
Host Data Bus Bits 7-0 and 8-15
The lower data bus is an 8-bit, tristate directional bus for
transferring status, data, and control information between the
host and the drive. The upper data bus is used for 16-bit data
transfers only.
2, 19,
22, 24,
26, 30,
40
GND
Ground.
20
Key - not connected.
21
DMARQ
O
DMA Request
Drive DMA signal Request to host (DMA only).
In UDMA mode is a drive initiation control signal.
23
DIOW-
STOP
I
I/O Write
The host or DMA controller asserts IOW- when a data or control
byte is written to the WD Scorpio drive.
In UDMA mode is a stop control signal.
25
DIOR-
HDMARDY-
HSTROBE
I
I/O Read
The host or DMA controller asserts IOR- when a data or status
byte is read from the WD Scorpio drive.
In UDMA read mode is a receiver pause control signal.
In UDMA write mode is a data clock signal.
27
IORDY
DSTROBE-
DDMARDY-
O
I/O Channel Ready
Drive ready signal to host. Used with host systems that support
Flow Control Protocol to maximize burst transfer rates.
In UDMA read mode is a data strobe.
In UDMA write mode is a DMA ready signal.
28
CSEL
I
Cable Select
Configures the drive status as either a master or slave drive.
29
DMACK-
I
DMA Acknowledge
DMA handshake line asserted by host in response to
HDMAREQ.
31
INTRQ
O
Host Interrupt Request
The WD Scorpio drive asserts INTRQ to request interrupt service
from the host.
32
IOCS16-
O
I/O Channel Select 16
Identifies data transfers to or from the host as 16 bits wide.