November 09, 2018
24
Table 3-1 Addressing Mode Summary
Address Mode
Instruction Times in Memory
Cycle
Memory Utilization in Number
of Program Sequence Bytes
Original 8-bit
NMOS
6502
New
W65C816S
Original 8-bit
NMOS
6502
New
W65C816S
Absolute
4 (5)
4 (3,5)
3
3
Absolute Indexed Indirect (Jump)
-
6
-
3
Absolute Indirect (Jump)
5
5
3
3
Absolute Long
-
5 (3)
-
4
Absolute Long, X
-
5 (3)
-
4
Absolute, X
4 (1,5)
4 (1,3,5)
3
3
Absolute, Y
4 (1)
4 (1,3)
3
3
Accumulator
2
2
1
1
Block Move (xyc)
-
7
-
3
Direct
3 (5)
3 (3,4,5)
2
2
Direct Indexed Indirect (d,x)
6
6 (3,4)
2
2
Direct Indirect
-
5 (3,4)
-
2
Direct Indirect Indexed (d),y
5 (1)
5 (1,3,4)
2
2
Direct Indirect Indexed Long [d],y
-
6 (3,4)
-
2
Direct Indirect Long
-
6 (3,4)
-
2
Direct, X
4 (5)
4 (3,4,5)
2
2
Direct, Y
4
4 (3,4)
2
2
Immediate
2
2 (3)
2
2 (3)
Implied
2
2
1
1
Relative
2 (1,2)
2 (2)
2
2
Relative Long
-
3 (2)
-
3
Stack
3-7
3-8
1
1
Stack Relative
-
4 (3)
-
2
Stack Relative Indirect Indexed
-
7 (3)
-
2
Notes (these are indicated in parentheses):
1.
Page boundary, add 1 cycle if page boundary is crossed when forming address. STA
abs,x takes 5 cycles when M=1.
2.
Branch taken, add 1 cycle if branch is taken.
3.
M = 0 or X = 0, 16 bit operation, add 1 cycle, add 1 byte for immediate.
4.
Direct register low (DL) not equal zero, add 1 cycle.
5.
Read-Modify-Write, add 2 cycles for M = 1, add 3 cycles for M = 0.
