TSOP37S40
www.vishay.com
Vishay Semiconductors
Rev. 1.2, 24-Sep-2018
6
Document Number: 82671
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
PACKAGE DIMENSIONS
in millimeters
Notes
(1)
Optically effective area
(2)
Pins connected internally. It is not necessary to connect externally
Drawing-No.: 6.550-5315.01-4
Issue: 2; 12.02.14
Not indicated tolerances ± 0.1
technical drawings
according to DIN
specifications
Proposed pad layout from
component side
(dim. for reference only)
(3.95)
(3.95)
(0.35)
(0.8)
(2.75)
(3)
(4 x)
(4x)
0.55
(0.95)
0.55
(1.8)
0.75
± 0.05
4 x 0.75 = 3
0.35
± 0.05
(8 x)
1.5
3
(0.3)
(0.3)
(0.3)
(0.7)
0.475
(0.4)
0.8
0.15
Pinning from topview
GND
GN
D
Out
Vs
(V
s
)
(G
N
D
)
(G
N
D
)
(G
N
D
)
1 2 3 4 5
8 7 6
Pin 1 identification
(2)
(2)
(2)
(2)
3.95
3.95
(2.75)
(1.9)
(3.4)
marking area
Pin 1 Identification
(1)
(1)
(1)
