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Confidential - Do Not Copy
VA702-1_VA702b-1
26
127 GND
Ground
128 LVBOP
O
B-Link Positive LVDS Differential Data
7.4
U105 (Micro-controller: W78E65P-40)
Pin
Symbol
I/O
Description
1
P4.2/INT3
A bi-directional I/O port with alternate function.
2
P1,0/T2
O
Enable panel power on
3
P1.1/T2EX
O
Enable CCFL work
4 P1.2
I
VGA
cable
detection
5
P1.3/PWM0
O
provide alternated function of PWM Volume
6 P1.4/PWM1
O
provide alternated function of PWM Green LED
lighting control
7 P1.5/PWM2
O
provide alternated function of PWM Orange LED
lighting control
8
P1.6/PWM3
Function is the same as that of standard 8052
9
P1.7/PWM4
Function is the same as that of standard 8052
10
RST
I
Reset control pin
11 P3.0/RXD
SCL
line
of
I2C for EDID, debug function
12 P4.3/INT2
PORT 4: A bi-directional I/O port with alternate
function.
13
P3.1/TXD
SDA line of I2C for EDID, debug function
14 P3.2/INT0
I
Interrupt request control pin
15
P3.3/INT1
O
Shut Down Volume Mute standard 8052.
16
P3.4/T0
O
SCL line of I2C communication with EEPROM
17
P3.5/T1
I/O
SDA line of I2C communication with EEPROM
18
P3.6/WR
I
DVI cable detection standard 8052.
19 P3.7/RD
O
EEPROM write protection control for DVI EDID
Prevent E2PROM Write in standard 8052.
20
XTAL2
Crystal 22.1184MHz In
21
XTAL1
Crystal 22.1184MHz out
22 GND
Sink
voltage
ground
23
P4.0
A bi-directional I/O port with alternate function.
24
P2.0/A8
DC power on/off control
25 P2.1/A9
OSD
“
►
” control to adjust value to increase
26 P2.2/A10
OSD
“
◄
” control to adjust value to decrease
27
P2.3/A11
Selection of menu command listed
28
P2.4/A12
OSD page selection
29
P2.5/A13
Auto adjustment control
30
P2.6/A14
A bi-directional I/O port with internal pull-ups
31
P2.7/A15
A bi-directional I/O port with internal pull-ups
32
PSEN
Program Store Enable
33
ALE
Address Latch Enable
34
P4.1
A bi-directional I/O port with alternate function
35 EA
I
External Access Enable external ROM. The ROM
address and data will not be presented on the bus if
the EA pin is high and the program counter is
within the 64 KB area.
36
P0.7/AD7
I/O
DDR Direct Bus Communication with Scaler
37
P0.6/AD6
I/O
DDR Direct Bus Communication with Scaler
38
P0.5/AD5
I/O
DDR Direct Bus Communication with Scaler
39
P0.4/AD4
I/O
DDR Direct Bus Communication with Scaler
40
P0.3/AD3
I/O
WRZ line of DDR Direct Bus
41
P0.2/AD2
I/O
RDZ line of DDR Direct Bus
42
P0.1/AD1
I/O
ALE line of DDR Direct Bus
43
P0.0/AD0
O
Hardware reset to Scaler
44
+5V
I
+5V for MCU working voltage
ViewSonic Corporation
Содержание VA702-1
Страница 42: ...ViewSonic Corporation Confidential Do Not Copy VA702 1_VA702b 1 39 6 Black Screen and backlight turn on...
Страница 60: ...11 PCB Layout Diagrams Main board Top layout ViewSonic Corporation Confidential Do Not Copy VA702 1_VA702b 1 57...
Страница 61: ...Main board bottom Layout ViewSonic Corporation Confidential Do Not Copy VA702 1_VA702b 1 58...
Страница 62: ...ViewSonic Corporation Confidential Do Not Copy VA702 1_VA702b 1 59 POWER board...
Страница 63: ...ViewSonic Corporation Confidential Do Not Copy VA702 1_VA702b 1 60...