VIA Technologies KT880, Руководство пользователя

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BIOS
Page 4-7
Bank Interleave
This item allows you to set how many banks of DRAM support in your mainboard.
Options: Disabled, 2 Bank, 4 Bank.
Precharge to Active (Trp)
This item refers to the number of cycles required to return data to its original
location to close the bank or the number of cycles required to page memory before
the next bank activate command can be issued.
Options: 2T, 3T, 4T, 5T.
Active to Precharge (Tras)
This item specifies the number of clock cycles needed after a bank active command
before a precharge can occur (sets the minimum RAS pulse width.).
Options: 6T, 7T, 8T, 9T.
Active to CMD (Trcd)
This item sets the timing parameters for the system memory such as the CAS (Column
Address Strobe) and RAS (Row Address Strobe).
Options: 2T, 3T, 4T, 5T.
REF to ACT/REF to REF (Trfc)
This filed specifies the Row Refresh Cycle Time. Auto-refresh active to RAS# or
RAS# to auto refresh.
Options: 12T, 13T, 14T, 15T.
ACT(0) to ACT(1) (Trrd)
This field specifies the Row to Row delay of different banks.
Options: 2T, 3T.
DRAM Bus Selection
This item select the DRAM Bus channel.
Options: Auto, Single channel, Dual channel.
DRAM Command Rate
This item select the DRAM Command Rate.
Options: 1T command, 2T command.