24
VGA Share Memory Size
This BIOS feature controls the amount of system memory that is allocated to the integrated
graphics processor when the system boots up. The settings are 32MB,64MB ,128MBand
Disabled.
Select Display Device
This item can provide the single or multi display output. The settings are optional CRT, TV,
DVI, HDTV, HDMI, CRT+DVI, DVI+HDTV, TV+DVI, CRT+HDMI, HDTV+HDMI,
HDMI+TV.
3-6-3 PCI Timing Settings
Phoenix – AwardBIOS CMOS Setup Utility
PCI Timing Settings
Item Help
PCI Master 1 WS Write Disabled
PCI Master 1 WS Read Disabled
CPU to PCI Post Write Enabled
PCI Delay Transaction Enabled
DRDY-Timing Slowest
Menu Level >>
↑↓→←
Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Optimized Defaults F7:Standard Defaults
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles.
Select Enabled to support compliance with PCI specification version 2.1. The settings are:
Enabled and Disabled.
3-7
Integrated
Peripherals
Phoenix – AwardBIOS CMOS Setup Utility
Integrated Peripherals
Item Help
OnChip IDE Function Press Enter
OnChip Device Function Press Enter
OnChip IO Function Press Enter
Init Display First PCI Slot
Menu Level >
↑↓→←
Move Enter:Select Item +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Optimized Defaults F7:Standard Defaults
OnChip IDE Function
Please refer to section 3-7-1
OnChip Device Function
Please refer to section 3-7-2
OnChip SIO Function
Please refer to section 3-7-3
Init Display First
This item allows you to decide to activate whether PCI Slot or on-chip VGA first. The
settings are: PCI Slot, AGP Slot, On-Chip VGA.
