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Signal

Pin

Type

Function

SOGIN

Analog Sync-On-Green or Sync-On-Luma input. Allows recovery of the HSYNC

signal when this pin is AC-coupling to the Green (Red or Blue) analog signal source.

If not used, this pin should be left unconnected.

FILT

External PLL Loop Filter. When using the on-chip PLL, this pin must be connected to

an external filter network.

HSYNC

DIS

Horizontal Synchronization Input. This digital input signal controls the horizontal scan

frequency by synchronizing the start of the horizontal scan. The logic polarity of this

signal is controlled by the HSPOL bit.

VSYNC

DIS

Vertical Synchronization Input. This digital signal controls the vertical scan

frequency.

DCLK

106

OSR

DPort Pixel Clock. Output clock for the display port pixel data. DCLK is enabled by

the DCLKEN bit and can be inverted by the DCPOL bit. DCLK can be set to run at ½

pixel rate, for dual pixel output mode, by setting the DCK2EN bit. The internal DCLK

clock domain can be disabled by the DCLKOFF bit to reduce power consumption.

DCLKNEG

107

OSR

DPort Pixel Clock.

DVS

101

DPort Vertical Sync. DVS can be either active-high or active-low depending on the

VSPOL bit. Width and timing is controlled by the VPLSE and VDLY registers.

DHS

102

DPort Vertical Sync. DHS can be either active-high or active-low depending on the

HSPOL bit. Sync width can be controlled by the HPLSE register.

DEN

103

DPort Pixel Enable. This signal is active whenever valid data is present. The polarity

is specified by the DENPOL bit.

DER0

OSR

DER1

OSR

DER2

OSR

DER3

OSR

DER4

OSR

DER5

OSR

DER6

OSR

DER7

OSR

DEPort Red Pixel Data. In dual pixel output mode these pins are the EVEN red

outputs.

Содержание 17MB18

Страница 1: ......

Страница 2: ... 1 Analog PC Connector PL400 30 4 18 2 Scart Connector PL401 31 4 18 3 S Video Connector JK403 31 4 18 4 LVDS Panel Connector 1x20 PL179 31 4 18 5 TTL Panel Connector Even 2x17 PL177 32 4 18 6 TTL Panel Connector Odd 2x17 PL178 32 4 18 7 Panel Inverter Connector 1x11 PL176 32 4 18 8 Keypad Card Connector 1x5 PL175 33 4 18 9 Optional Keypad Connector to UOC 1x2 PL 202 33 4 18 10 LED IR Receiver Con...

Страница 3: ...1 General Description 46 5 11 2 Pin Description 46 5 12 STV0700 46 5 12 1 General description 46 5 12 2 Features 47 5 12 3 Pin Description 47 5 13 74HC373 52 5 13 1 General Description 52 5 13 2 Pin Connections 52 5 14 74HC245 52 5 14 1 General Description 52 5 14 2 Features 52 6 SERVICE MENU SETTINGS 53 6 1 UOCIII Service Menu 53 6 1 1 UOCIII Service Menu Settings 53 6 1 2 Tuner AGC Alignment 57 ...

Страница 4: ...nu 62 7 4 2 Audio Menü 63 7 4 3 Window Menu 63 7 4 4 Options Menü 63 8 BLOCK DIAGRAM 65 9 CIRCUIT DIAGRAMS 67 9 1 17MB18 5 Main Board Schematics 67 9 2 Keypad Schematics 72 9 3 IR LED Board Schematics 73 9 4 Remote Controller Schematics 74 9 5 Digital Module Schematics 75 9 6 Print Lay outs Analog Board 80 9 7 Print Lay outs Digital Board 89 10 SPARE PART LIST 94 10 1 Analog Side Spare List 94 10 ...

Страница 5: ...Mode 0 line will be displayed on the screen 5 Press RCs Volume button and set UOC to ISP mode ISP Mode 1 line will be displayed on the screen Step 2 Loading the Code 1 Connect the 5 pin cable of the programming board to PL203 of the 17MB18 mainboard Connect the programming board to the computer in which WISP program is loaded via Paralel Port 2 Run WISP program As it is seen in figure1 change Dela...

Страница 6: ... program reads the code You will see the blue bar indicating the reading operation on the bottom of the Wisp main menu window 7 Click Send button You will see the blue bar indicating the Loading Code to UOC IC on the bottom of the window When the loading operation is over without any error three green OK will be displayed on the window This indicates the loading operation is performed succesfully ...

Страница 7: ...t flasher hex and then romcode hex are being downloaded to the IC on 17MB18 main board 9 Power off the board when the download operation is over 10 Open jumper PL501 11 Power On the board Press Remote Controls RC Menu M and 4 7 2 6 buttons respectively 12 By using RIGHT and LEFT buttons of the RC select Service Submenu 2 13 By using DOWN button of the RC highlight Init NVM Press RIGHT button of th...

Страница 8: ...he TV are as listed below 1 Full Scart input with SVHS support 1 SVHS input through standard S Video interface 1 CVBS input through standard RCA jack 75 ohms antenna input D Sub 15 PC Input GERMAN NICAM STEREO 3W S B Power Consumption from mains supply 2x3W Speaker Output Power 16 Ohm spks HP Output Stereo Audio line out Stereo Audio line in Equalizer IR Control RC5 OSD Menu Languages ENG FRA GER ...

Страница 9: ...s UOCIII can handle all the audio processing there is no need for additional audio processor solution on the board UOC supports three Audio outputs These outputs are assigned to Headphone Speaker and Scart Audio line outputs The board employs TDA7056A and TDA1308 to drive speaker and headphone outputs respectively As another dedicated output for Audio Line out from jack is not possible in UOC this...

Страница 10: ...6 these sources should be multiplexed All the multiplexing operations are controlled by PW1306 via YUV_TV_SW 58 and VGA_TV_SW 57 signals A VGA _TV_SW B YUV _TV_SW A B SYNC SOURCE 0 0 UOC 0 1 VGA 1 0 YcbCr 1 1 NOT USED Table 2 H V Sync Multiplexing Table The video output from PW1306 is a 48 bit digital RGB bus format and made available on two separate connectors with TTL control signals i e HS VS C...

Страница 11: ...X BLOCK TV_ HS VS PC_ HS VS HD_ HS VS MUX 74HC4052D Control Signals VGA_TV_SW YUV_TV_SW AHSYNC AVSYNC V R G B IN VIDEO SWITCH P15V330 YCbCr R G B OUT VIDEO SWITCH P15V330 RGB TV_ R G B AIN Figure 1 MUX Block ...

Страница 12: ...K DAC CS4335 AUDIO AMPLIFIER 2xTDA7056 HP DRIVER TDA1308 V R G B IN PC_ HS VS YCbCr SYNC SEPARATOR EL1883 Y HD_ HS VS PORTD 5 6 58 57 H V SYNC 65 64 R G B AIN 37 43 50 PORTD7 56 Communication Interface UART Rx Tx Up IRQ D R G B E 0 7 PORTA7 201 DHS DVS DEN DCLK D R G B O 0 7 RGB MACROVISION YUV VGA _SW A H V SYNC LVDS DS90C385 PANEL UOCIII PW1306 PC in RF in Audio in Audio line out CVBS in R G B O...

Страница 13: ...de go to up menu item X Volume Tact sw Decrease the volume level in the volume In menu mode go to left menu item X Volume Tact sw Increase the volume level in the volume In menu mode go to right menu item X Connector PL1 on keypads connected to the connector PL175 on the main board Pin No Name Pin No Name 1 Volume 6 Program 2 Volume 7 Program 3 Ground 8 Menu 4 Not Connected 9 TV AV 5 Ground 10 Sta...

Страница 14: ...inear regulators and switches are used to generate several separate analog and digital voltage supplies such as 5 3 3 1 8 etc Please check the Figure 3 and Table 3 for power management details Table 3 Power management table ...

Страница 15: ...11 ...

Страница 16: ...l 4H 2H PAL NTSC combfilter Teletext decoder with 10 page text memory Multi standard stereo decoder BTSC stereo decoder Digital sound processing circuit Digital video processing circuit The UOC III series consists of the following 3 basic concepts Stereo versions These versions contain the TV processor with a stereo audio selector the TCG m Controller the multi standard stereo or BTSC decoder the ...

Страница 17: ...4 2 2 2 ground VDDC4 3 3 3 digital supply to SDACs 1 8V VDDA3 3 3V 4 4 4 supply 3 3 V VREF_POS_LSL 5 positive reference voltage SDAC 3 3 V VREF_NEG_LSL HPL 6 negative reference voltage SDAC 0 V VREF_POS_LSR HPR 7 positive reference voltage SDAC 3 3 V Figure 6 UOCIII Pin configuration stereo and AV stereo versions with Audio DSP ...

Страница 18: ...IFIN1 24 24 24 IF input 1 VIFIN2 25 25 25 IF input 2 VSC 26 26 26 vertical sawtooth capacitor IREF 27 27 27 reference current input GNDIF 28 28 28 ground connection for IF amplifier SIFIN1 DVBIN1 2 29 29 29 SIF input 1 DVB input 1 SIFIN2 DVBIN2 2 30 30 30 SIF input 2 DVB input 2 AGCOUT 31 31 31 tuner AGC output EHTO 32 32 32 EHT overvoltage protection input AVL SWO SSIF REFO REFIN 2 3 33 33 33 Aut...

Страница 19: ...io 3 input AUDIOIN3L 56 56 audio 3 input left signal AUDIOIN3R 57 57 audio 3 input right signal CVBS3 Y3 58 58 58 CVBS3 Y3 input C2 C3 59 59 59 chroma 2 3 input AUDOUTLSL 60 62 audio output for audio power amplifier left signal AUDOUTLSR 61 63 audio output for audio power amplifier right signal AUDOUT AMOUT FMOU T 62 audio output AM output FM output volume controlled AUDOUTHPL 62 audio output for ...

Страница 20: ... 3 V VREFAD_NEG 89 89 89 negative reference voltage 0 V VREFAD_POS 90 90 90 positive reference voltage 3 3 V VREFAD 91 reference voltage for audio ADCs 3 3 2 V GNDA 92 92 92 ground VDDA 1 8V 93 93 93 analogue supply for audio ADCs 1 8 V VDDA2 3 3 94 94 94 supply voltage SDAC 3 3 V VSSadc 95 95 95 ground for video ADC and PLL VDDadc 1 8 96 96 96 supply voltage video ADC and PLL INT0 P0 5 97 97 97 e...

Страница 21: ...5 or PWM4 output VDDC3 124 124 124 digital supply to core 1 8V VSSC3 125 125 125 ground P1 2 INT2 126 126 126 port 1 2 or external interrupt 2 P1 4 RX 127 127 127 port 1 4 or UART bus P1 5 TX 128 128 128 port 1 5 or UART bus 4 3 PW1306 The PW1306 Video Image Processor is a system on a chip that oversamples and processes RGB or YPbPr video from analog video decoders The PW1306 integrates video proc...

Страница 22: ... 5 volt tolerant DIS digital input 5 volt tolerant Schmitt trigger I XTALIN XTALOUT P power NC no connect BOD bidirectional open drain OSR output with slew rate Signal Pin Type Function RAIN 37 AI GAIN 43 AI BAIN 50 AI Red Green Blue Analog Inputs These pins receive the Red Green and Blue or YPbPr YCbCr YUV analog signals from the analog video source For proper operation of the clamp feature these...

Страница 23: ...he display port pixel data DCLK is enabled by the DCLKEN bit and can be inverted by the DCPOL bit DCLK can be set to run at pixel rate for dual pixel output mode by setting the DCK2EN bit The internal DCLK clock domain can be disabled by the DCLKOFF bit to reduce power consumption DCLKNEG 107 OSR DPort Pixel Clock DVS 101 OS DPort Vertical Sync DVS can be either active high or active low depending...

Страница 24: ...EB6 67 OSR DEB7 66 OSR DEPort Blue Pixel Data In dual pixel output mode these pins are the EVEN blue outputs VCLK 72 I O D5 DVPort Pixel Clock The VCLK pin is used for DV port image capture The polarity can be selected by the VCLKPOL bit VPEN 55 I O D5 DVPort Pixel Enable Used when external flow control capture mode is enabled by the EXTFCE bit When VPEN is active the input data is valid The polar...

Страница 25: ...tputs In single pixel output mode these pins are not used DOG0 121 I O SR5 DOG1 120 I O SR5 DOG2 119 I O SR5 DOG3 118 I O SR5 DOG4 117 I O SR5 DOG5 116 I O SR5 DOG6 115 I O SR5 DOG7 114 I O SR5 DOPort Green Pixel Data In dual pixel output mode these pins are the ODD green outputs In single pixel output mode these pins are not used DOB0 113 I O SR5 DOB1 112 I O SR5 DOPort Blue Pixel Data In dual pi...

Страница 26: ...Enable Low indicates a write to external ROM CS0 199 I O D5 Miscellaneous Chip Select 0 Low selects external devices CS1 200 I O D5 Miscellaneous Chip Select 1 When EXTRAMEN 0 low selects external devices Chip select for external RAM When EXTRAMEN 1 low selects external RAM RAMCS NMI 194 ID 5 Non Maskable Interrupt A high input triggers a non maskable interrupt to the on chip microprocessor A1 193...

Страница 27: ...O D5 D5 155 I O D5 D6 154 I O D5 D7 153 I O D5 D8 152 I O D5 D9 151 I O D5 D10 150 I O D5 D11 149 I O D5 D12 148 I O D5 D13 145 I O D5 D14 144 I O D5 D15 143 I O D5 Microprocessor 16 bit bidirectional data bus PORTA0 208 I O U5 General purpose I O port bit controlled by PADAT0 and PAEN0 This pin has one other possible function when EXTRAMEN 1 When EXTRAMEN 1 and PAEN0 0 PORTA1 is microprocessor ad...

Страница 28: ...s output can be routed through an external spread spectrum chip and then back into port A3 DCLK input to implement spread spectrum PORTA6 202 I O U5 General purpose I O port bit controlled by PADAT6 and PAEN6 This pin has one other possible function when PREF1EN 1 When PREF1EN 1 and PAEN6 0 PORTA6 is a variable duty cycle pulse reference generator PWM output controlled by PREF1HI and PREF1LO PORTA...

Страница 29: ...134 172 187 P Digital I O ground VDDPA1 167 P 1 8V analog clock generator power VDDPA2 165 P 1 8V analog clock generator power VSSPA1 168 P Clock generator analog ground VSSPA2 166 P Clock generator analog ground PVD 22 24 26 P 1 8V PLL power PGND 21 25 27 P PLL ground DVDD1 1 3 20 P 1 8V ADC digital power DGND1 2 4 19 P ADC digital ground ALVDD 28 29 P 1 8V ADC PLL power ALGND 30 31 P ADC PLL gro...

Страница 30: ...ta channel Using a 85 MHz clock the data throughput is 297 5 Mbytes sec 20 to 85 MHz shift clock support Tx power consumption 130 mW typ 85MHz Grayscale Supports VGA SVGA XGA and Dual Pixel SXGA Up to 2 38 Gbps throughput Up to 297 5 Megabytes sec bandwidth PLL requires no external components Compatible with TIA EIA 644 LVDS standard 4 6 P15V330 The PI5V330 is a true bidirectional Quad 2 channel m...

Страница 31: ...ed for use in TV and monitors Mute mode No switch on and off clicks Thermal protection Short circuit proof ESD protected on all pins 4 10 TDA1308 The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 DIP8 or a TSSOP8 plastic package Wide temperature range No switch on off clicks Low power consumption Short circuit resistant PIN SYMBOL DESCRIPTION PIN VALUE 1 OUTA Output...

Страница 32: ...n Output Current 800mA Line Regulation 0 2 Max Load Regulation 0 4 Max Temperature Range LM1117 0 C to 125 C LM1117I 40 C to 125 C 4 12 24LC32 24LC32 is a 4K x 8 32Kbit Serial Electrically Erasable PROM capable of operation across a broad voltage range 2 5V to 6 0V 4 13 24LC21 24LC21 is a 128 x 8 bit Electrically Erasable PROM This device is designed for use in applications requiring storage and s...

Страница 33: ...e debounce time are expected The device can generate 2048 different commands and utilizes a keyboard with a single pole switch for each key The commands are arranged so that 32 systems can be addressed each system containing 64 different commands The circuit response to legal one key pressed at a time and illegal more than one key pressed at a time keyboard operation is specified in the section Ke...

Страница 34: ...low power standby mode that reduces power supply current to 36 mA Output Switch Current in Excess of 5 0 A Fixed Frequency Oscillator 72 kHz with On Chip Timing Provides 5 05 V Output without External Resistor Divider Precision 2 Reference 0 to 95 Output Duty Cycle Cycle by Cycle Current Limiting Under voltage Lockout with Hysteresis Internal Thermal Shutdown Operation from 7 5 V to 40 V Standby M...

Страница 35: ...ontrol High 1 3V RGB Low 0 0 4V Composite 75ohms 17 Ground video input output 18 Ground RGB switching control 19 CVBSO2 Video output composite 1V including sync 75ohms 20 Y1SCART Video input composite or Luminance input 1V including sync 75ohms 21 Common ground shield 4 18 3 S Video Connector JK403 Pin Signal Impedance 1 Ground 2 Ground 3 Luminance 75 4 Chrominance 75 4 18 4 LVDS Panel Connector 1...

Страница 36: ...en 34 DCLK 4 18 6 TTL Panel Connector Odd 2x17 PL178 Pin Symbol Description Pin Symbol Description 1 DBO7 Blue 18 DGO1 Green 2 DBO6 Blue 19 DGO0 Green 3 DBO5 Blue 20 GND Ground 4 DBO4 Blue 21 DRO7 Red 5 GND Ground 22 DRO6 Red 6 DBO3 Blue 23 DRO5 Red 7 DBO2 Blue 24 DRO4 Red 8 DBO1 Blue 25 GND Ground 9 DBO0 Blue 26 DRO3 Red 10 GND Ground 27 DRO2 Red 11 DGO7 Green 28 DRO1 Red 12 DGO6 Green 29 DRO0 Re...

Страница 37: ...ched 12V 4 18 12 PROMJet Connector 2x25 PL101 Pin Symbol Description Pin Symbol Description 1 2 NC Not connected 27 28 A 15 16 Address 3 A 1 Address 29 30 A 13 14 Address 4 V3_3D Digital 3 3V 31 32 A 11 12 Address 5 GND 33 34 A 9 10 Address 6 ROMOE ROM output enable 35 36 37 NC Not connected 7 9 11 13 D 0 3 Data 38 ROMWE ROM write enable 8 10 12 14 D 8 11 Data 39 V3_3D Digital 3 3V 15 V3_3D Digita...

Страница 38: ...onnector for Side card Option PL406 Pin Signal Pin Signal 1 Ground 4 Right Audio in 2 Left Audio in 5 Ground 3 Ground 6 CVBS in 4 18 15 Side SVHS Connector for Side card Option PL407 Pin Signal 1 Y Luma 2 Ground 3 C Chroma ...

Страница 39: ... DCXO DCXO crystal alignment Crystal alignment 70 4 DCXO Auto Automatic DCXO frequency alignment When it is set to 1 UOC automaticaly calculates DCXO values and writes it to item number 3 Crystal alignment 0 5 Track mode Geometry 0 6 Rotation Geometry 31 7 Hor Shift Geometry 32 8 HBL Zoom 0 9 WBF Zoom 4 10 WBR Zoom 8 11 WSS WSS Wide Screen Siganling enable Zoom Options 1 12 Gld SCART Zoom Options ...

Страница 40: ...0 SoftClipLevel Bit Control 0 51 OP AUDIO CONFIG Audio options 2 52 OP BILING Audio options 1 53 OP HP Audio options 1 54 OP EQUAL Audio options 1 55 OP DOLBY Audio options 0 56 OP TRUSUR Audio options 0 57 OP DUB DBE Audio options 0 58 OP BBE Audio options 0 59 AVL LEV AVL level setting Audio 1 60 AVL WGT AVL weight setting Audio 1 61 AVL MOD AVL response time setting Audio 3 62 AVLE AVL enable d...

Страница 41: ...eset 34 99 PA TR MU Audio Preset 39 100 PA LM MU Audio Preset 1 101 PA ST MU Audio Preset 5 102 PA LO MU Audio Preset 1 103 PA B1 MU Audio Preset 52 104 PA B2 MU Audio Preset 47 105 PA B3 MU Audio Preset 29 106 PA B4 MU Audio Preset 29 107 PA B5 MU Audio Preset 45 108 PA BA TH Audio Preset 36 109 PA TR TH Audio Preset 34 110 PA LM TH Audio Preset 1 111 PA ST TH Audio Preset 5 112 PA LO TH Audio Pr...

Страница 42: ...ns 0 148 PWR ONKEY Power options 1 149 Factory Mode GTV 3 2 1 0 150 CombFil Combfilter enable disable Video options 1 151 BlueBlackNoMute Video options 0 152 ATS Installation opt 1 153 EVG Bit Control 0 154 DFL Bit Control 0 155 XDT Bit Control 0 156 AKB Bit Control 1 157 OSVE Bit Control 0 158 CL Colour alignment 10 159 LCD BRT UOC Brightness Sub System 36 160 LCD CON UOC Contrast Sub System 32 1...

Страница 43: ... low RF reception and color separation performance Test Set up This alignment will be performed just after Tuner AGC Alignment Apply NICAM Stereo and 60 dB PAL B G RF signal from pattern generator Frequency must be set to 224 25 MHz Turn on the TV Enter UOC service menu as described above and go to DCXO Auto setting Set DCXO Auto value to 1 by pressing Volume TV will automatically align the DCXO D...

Страница 44: ...m CVBS input Press RC AV button and switch to CVBS input and observe the pattern applied Enter to PW1306 service menu Press RC DOWN button at Service Submenu 1 and highlight UOC Calibration Press RC RIGHT button to start calibration 6 2 3 PW1306 PC Input ADC Calibration Connect your TV with your PC and press RC PC button and observe the image Press M to display Menu and select Options by using rig...

Страница 45: ...utton and highlight Hotel Mode Activate Press RC RIGHT and LEFT buttons to set the option between off and on 6 2 7 Burn In Mode Press RC RIGHT button at Service Submenu 1 and switch to Service Submenu 2 Press RC RIGHT button at Service Submenu 2 and switch to Service Submenu 3 Press RC DOWN button and highlight Burn In Mode Press RC RIGHT and LEFT buttons to set the option between off and on 6 2 8...

Страница 46: ...ange Shortcut As 17MB18 software supports from 14 to 23 panel types it is possible not to see anything on the screen after Init NVM as the default panel type is 23 in the software That s why a hidden menu is needed to change supported panel from a hidden menu which is not shown on the screen In order to work with PW panel type selection shortcut service menu Press Menu M and 4 7 2 7 buttons of RC ...

Страница 47: ...lues to the EEPROM Adjust the settings of Service Menu and User Menu This EEPROM can be used as Master EEPROM 7 2 2 Creating Mass Production EEPROM The Master EEPROM prepared like above is copied and multiplied to use in mass production The copy EEPROM is placed on IC 101 of 17MB18 When TV is turned on the software will realise that EEPROM is not empty so SW will not change the values in the EEPRO...

Страница 48: ...m lighting bright sleep time 0 child lock off Will be changed according to the DI 7 3 5 Settings Menu Installation Channel Setup APS program number country program name aps manual search standard Auto store frequency fine tuning program skip Off teletext language Europe teletext region West Will change according to the user and the country it is used 7 4 PC Mode Menu 7 4 1 Picture Menu Picture bri...

Страница 49: ...7 4 4 Options Menü Options menu background opaque Language room lighting normal auto adjustment child lock off Will be changed according to the DI Service Submenu 3 and Service Submenu 4 are named as Factory Settings 1 and Factory Settings 2 in the Service menu To activate the Factory Settings menu you should follow the steps below Press the Menu key at the remote controller Enter the valid access...

Страница 50: ...in the Factory Settings 1 menu can be activated and their effects can be seen after this process only Also the items in the Picture Audio Feature menus of the TV are set to their default values that are stored in the eprom Factory Settings ...

Страница 51: ...RF in Audio In L R RGB TA1366 LTI CTI YUV out YUV in RGB FB RGB Scart DAC CS4335 I2S PI5 V330 Optional YCbCr input FBLIN Side Board Optional YCbCr input from scart PI5 V330 YUV_TV_SW VGA_TV_ SW DRGB 24 DEN DCLK DVS DHS TTL 48 16MB39 IDTV Module CVB S RGB Audio R L Communication Interface UART Rx Tx Up IRQ ...

Страница 52: ...9 CIRCUIT DIAGRAMS 9 1 17MB18 5 Main Board Schematics ...

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Страница 57: ...72 17 TFT TV Service Manual 9 2 Keypad Schematics 17TK26 ...

Страница 58: ...73 17 TFT TV Service Manual 9 3 IR LED Board Schematics 17LD23 ...

Страница 59: ...74 17 TFT TV Service Manual 9 4 Remote Controller Schematics 11UK10 2 ...

Страница 60: ...9 6 DIGITAL MODULE SCHEMATIC 75 ...

Страница 61: ...76 ...

Страница 62: ...77 ...

Страница 63: ...78 ...

Страница 64: ...79 ...

Страница 65: ...80 ...

Страница 66: ...17MB18 5 TOP Print Lay outs Analog Board ...

Страница 67: ... 17MB18 5 TOPmask ...

Страница 68: ...17MB18 5 TOPsilk ...

Страница 69: ... 17MB18 5 inner1 ...

Страница 70: ...17MB18 5 inner2 ...

Страница 71: ...17MB18 5 BOT ...

Страница 72: ...17MB18 5 BOTTOMMASK ...

Страница 73: ...17MB18 5 BOTTOMSILK ...

Страница 74: ...NN HEADER 2P 2 5MM TOP WHT SD RoHS 3 X PL102 PL103 PL104 52 3 30033112 CONN HEADER 4P 2 5MM TOP WHT SD RoHS 1 X PL101 57 4 30018574 DIODE SCH SS33 3A 30V DO214AB ROHS 1 X D101 58 4 30027635 IC STEP DOWN LM2576 12V 3A D2PAK RoHS 1 X IC100 60 4 30035282 FUSE SAFE SMD 5A 32VDC 33A 1MSINR ROHS 1 X F101 62 1 20224759 MD ASY 17TK26 7SW 2310 11 TFT MB18 ROH 1 X 64 3 30027440 PUSH SWITCH ON OFF 0 1A 12RoH...

Страница 75: ... 1 X Z201 174 4 30001741 XTAL 24 576 20p HC49U ROHS 1 X X201 175 4 30011450 FIXED COIL 22UH 5 4A 11 5x15 5 ROHS 1 X L509 176 4 30011742 CABL 1P 25 SISRoHS 2 X IC410 IC411 177 4 30012545 FILTER SAW K9656M ROHS 1 X Z200 178 4 30017946 XTAL 14 318 MHZ ROHS 1 X X100 179 4 30018047 CONN HEADER 11P 1 25MM SIDE RoHS 1 X PL176 180 4 30018089 SOCET SCART BLACK TFT RoHS 1 X PL401 181 4 30027932 DC POWER SOC...

Страница 76: ...1 JACK HEADPHONE STEREO WO SW ROHS 1 X JK406 213 1 30033122 PSU 24VDC 6A C14 4PO W PFC SAFE PKG RoHS 1 X 214 1 40011431 LOGO WHARFEDALE W P SILVER HST ROHS 1 X 215 1 50018337 NYLON SHIELD 50 90 15 15 HDPE 14 24 5 X ...

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