Vertex Standard VX-146, Руководство по обслуживанию

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Circuit Description
Automatic Transmit Power Control
Current from the final amplifier is sampled by R1120,
R1121 and R1143, and is rectified by Q1032 (
IMZ2A
). The
resulting DC is fed back through Q1035 (
FMW1
) to the
drive amplifier Q1015 and final amplifier Q1022 , for con-
trol of the power output.
Transmit Inhibit
When the transmit PLL is unlocked, pin 7 of PLL chip
Q1004 goes to a logic “Low”, and unlock detector Q1005
(
2SA1602A-F
) goes to a logic “High”. The resulting DC
unlock control voltage is passed to pin 14 of the micro-
processor Q1011 . While the transmit PLL is unlocked, pin
22 of Q1011 remains high, which then turns off Q1029
(
CPH6102
) and the Automatic Power Controller Q1035
(
FMW1
) to disable the supply voltage to the drive ampli-
fier Q1013 , Q1015 and final amplifier Q1022 , thereby dis-
abling the transmitter.
Spurious Suppression
Generation of spurious products by the transmitter is min-
imized by the fundamental carrier frequency being equal
to final transmitting frequency, modulated directly in the
transmit VCO. Additional harmonic suppression is pro-
vided by a low-pass filter consisting of L1003, L1004 &
L1005 plus C1002, C1016, C1017, C1018, C1019, C1021 and
C1023, resulting in more than 70 dB of harmonic suppres-
sion prior to delivery to the antenna.
PLL Frequency Synthesizer
The PLL circuitry on the Main Unit consists of VCO Q1003
(
2SK508-K52
), VCO buffer Q1007 (
2SC5005
), and PLL
subsystem IC Q1004 (
MB15A02PFV1
), which contains a
reference divider, serial-to-parallel data latch, program-
mable divider, phase comparator and charge pump.
Frequency stability is maintained by temperature compen-
sating thermistor TH1001. The output from TH1001 is
applied to pin 39 of Q1011 . Q1011 output thermal data to
D/A converter Q1002 (
M62364FP
) which produce the DC
voltage according with the thermal data. The resulting DC
voltage is applied to varactor diode D1004 (
HVC350B
) to
stabilize the 14.6MHz Reference Frequency.
While receiving, VCO
Q1003 oscillates between 401.75625
and 401.84375 MHz according to the transceiver version
and the programmed receiving frequency. The VCO out-
put is buffered by Q1007 , then applied to the prescaler
section of Q1004 . There the VCO signal is divided by 64
or 65, according to a control signal from the data latch
section of Q1004 , before being sent to the programmable
divider section of Q1004 .
The data latch section of Q1004 also receives serial divid-
ing data from the microprocessor Q1014 , which causes
the pre-divided VCO signal to be further divided in the
programmable divider section, depending upon the de-
sired receive frequency, so as to produce a 6.25 kHz de-
rivative of the current VCO frequency.
Meanwhile, the reference divider section of
Q1004 divides
the 14.6 MHz crystal reference from the reference oscilla-
tor Q1004 , by 2336 to produce the 6.25 kHz loop refer-
ence.
The 3.125 kHz signal from the programmable divider (de-
rived from the VCO) and that derived from the reference
oscillator are applied to the phase detector section of
Q1004 , which produces a pulsed output with pulse dura-
tion depending on the phase difference between the in-
put signals.
This pulse train is filtered to DC and returned to the var-
actor D1001 (
HVC355B
). Changes in the level of the DC
voltage applied to the varactor, affecting the reference in
the tank circuit of the VCO according to the phase differ-
ence between the signals derived from the VCO and the
crystal reference oscillator.
The VCO is thus phase-locked to the crystal reference os-
cillator. The output of the VCO Q1003 , after buffering by
Q1007 is applied to the first mixer as described previously.
For transmission, the VCO Q1003 oscillates between
446.00625 and 446.09375 MHz according to the model
version and programmed transmit frequency. The remain-
der of the PLL circuitry is shared with the receiver. How-
ever, the dividing data from the microprocessor is such
that the VCO frequency is at the actual transmit frequen-
cy (rather than offset for IFs, as in the receiving case). Also,
the VCO is modulated by the speech audio applied to
D1002 (
HVU350
), as described previously.
Receive and transmit buses select which VCO is made ac-
tive by Q1001 (
RT1N441U
).
Push-To-Talk Transmit Activation
The
PTT
switch on the microphone is connected to pin 35
(External PTT) and pin 48 (Internal PTT) of microproces-
sor Q1011 , so that when the
PTT
switch is closed, pin 23
of Q1011 goes low. This signal disables the receiver by
disabling the 5 V supply bus at Q1020 (
DTB123EK
) to the
front-end, FM IF subsystem IC Q1045 and receiver VCO
circuitry.
At the same time,
Q1028 (
FMW1
) and Q1029 (
CPH6102
)
activate the transmit 5V supply line to enable the trans-
mitter.