Interfaces and Connectors
EBX-22 Reference Manual
49
Audio
The audio interface on the EBX-22 is implemented using the VIA VT1708 High Definition
Audio Codec. This interface is AC’97 2.3 compatible. Drivers are available for most Windows-
based operating systems. To obtain the most current versions, consult the EBX-22 product
J23 provides the line-level stereo input and line-level stereo output connection points. The
outputs will drive any standard-powered PC speaker set.
S
OFTWARE
C
ONFIGURATION
The audio interface uses PCI interrupt INTB#. The CMOS setup screen is used to select the IRQ
line routed to INTB#.
The audio controller can be disabled within the CMOS setup.
Table 21: Audio Pinout
J23 Pin
CBR-4004
J9 Pin
Signal
Name
Function
37 2
AUDINR
Line-In
Right
39 4
AUDINL
Line-In
Left
40 5
GND
Ground
J23 Pin
CBR-4004
J8 Pin
Signal
Name
Function
32 2
AUDOUTR
Line-Out
Right
34 4
AUDOUTL
Line-Out
Left
35 5
GND
Ground
Watchdog Timer
A watchdog timer circuit is included on the EBX-22 that resets the CPU if proper software
execution fails or a hardware malfunction occurs.
E
NABLING THE
W
ATCHDOG
Bit D7 of the WDSET register (I/O port 1E0h) is used to enable or disable the watchdog from
resetting the CPU on timer expiration. The EXP field (bits D6-D0) of the same register set the
expiration time. The expiration time can be set to a maximum of just under 16 seconds (7Fh) and
a minimum of 1 second (08h). The formula for determining the EXP code is given as:
Seconds x 8 = Decimal Value = Hex Value
For example, for an expiration time of 5.5 seconds:
5.5 x 8 = 44 = 2Ch (written to the EXP field of the WDSET register)
D
ISABLING THE
W
ATCHDOG
Clearing bit D7 in the WDSET register (at I/O port 1E0h) disables the watchdog timer. No
special procedure is required.
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