Interfaces and Connectors
EBX-41 Reference Manual
41
D
IGITAL
I/O
P
ORT
C
ONFIGURATION
U
SING THE
SPI
I
NTERFACE
Digital I/O channels 0-31 are accessed via SPI slave select 6 (writing 6h to the SS field in
SPICONTROL). Each pair of I/O ports is configured by a set of paged I/O registers accessible
through SPI. These registers control settings such as signal direction, input polarity, and interrupt
source.
Digital I/O Initialization Using the SPI Interface
There are two Microchip MCP23S17 digital I/O devices used. Digital I/O channels 0-15 map to
device #0 (address “000”) and channels 15-31 to device #1 (address “001”). Please refer to the
Microchip MCP23S17 datasheet
for more information about the MCP23S17. Before accessing
the digital I/O devices a ‘1’ must be written to the control bit HAEN in the IOCON register
(write a 8h to this register) in the MCP23S17 devices. This write is done to device address “000”
which will actually write this HAEN bit to both devices. Once this HAEN bit is set then both
devices can be independently accessed. This must be done anytime these parts are reset. Example
code is shown below (this assumes the FPGA base address is the default setting CA0h).
MOV
DX, CA8h
MOV
AL, 26h
;SPICONTROL: SPI Mode 00, 24bit, auto, SPI 6
OUT
DX, AL
MOV
DX, CA9h
MOV
AL, 30h
;SPISTATUS: 8MHz, no IRQ, left-shift
OUT
DX, AL
MOV
DX, CABh
MOV
AL, 08h
;SPIDATA1: Set HAEN Bit to a ‘1’
OUT
DX, AL
MOV
DX, CACh
MOV
AL, 0Ah
;SPIDATA2: MCP23S17 IOCON addr 0x0A
OUT
DX, AL
MOV
DX, CADh
MOV
AL, 40h
;SPIDATA3: MCP23S17 write to device “000”
OUT
DX, AL
BUSY: MOV DX, CA9h
IN
AL, DX
;Get SPI status
AND
AL, 01h
;Isolate the BUSY bit
JNZ
BUSY
;Loop back if SPI transaction is not complete
Digital I/O Interrupt Generation Using the SPI Interface
Digital I/O can be configured to issue hardware interrupts on the transition (high to low or low to
high) of any digital I/O pin. IRQ assignment is made in SPI control register SPISTATUS. This
IRQ is shared among all SPI devices connected to the VL-EBX-41 (the ADC and DAC devices
on the SPI interface do not have interrupts). Digital I/O chip interrupt configuration is achieved
through I/O port register settings. Please refer to the
Microchip MCP23S17 datasheet
for more
information.
The on-board digital I/O chips must be configured for open-drain and mirrored interrupts in order
for any SPI device to use hardware interrupts. The following code example illustrates how to do
this for device #0 on channels 0-15. Normally, the BIOS initializes the on-board digital I/O chips
at boot time.
MOV
DX, CA8h
MOV
AL, 26h
;SPICONTROL: SPI Mode 00, 24bit, auto SPI 6
OUT
DX, AL
