Vantron VT-SBC-3568, Руководство пользователя

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VT-SBC-3568 | User Manual 7 www.vantrontech.com
1.3 Block Diagram
R ockchip
R K 3568
C P U : O cta-core C ortex-
A 55 ， 2.0G H z
G P U : M ali-G 52-2E E
I2C 0
P M IC
R K 809-5
P ow er R ail
eM M C 5.1,
16G B
E M M C
2K bit E E P R O M
LP D D R 4
512M bx32
D D R
S D IO 1
2
x20
x2
.5
4m
m
I2C 5_M 0
P T N 3460B S
eD P
U A R T 2_M 0 for D ebug
W iF i & B T 5.0
A P 6256
802.11 a/b/g/n/ac U A R T 1_M 0
W iFi & B T
A N T
U
SB3
_O
TG
0
B uttonx1
S leep/W ake up
T o system 5V
1x4x2.54m m
M A IN B O A R D
LP D D R 4x
1G B *32b
12xG P IO F or R elay and P assive C ontacts
I2S 1
D C /D C
3.3V /3A
D C /D C
5V /3A
H D M I
R J45
U S B 3.0 T ype-A U S B 2.0 T ype-A
C A N 0_M 1
C A N 1_M 1
U A R T 3_M 1 R S 232-1
U S B 2.0 T ype-C
D C IN
1x4x2.0m m
or
P ow er Jack
S ystem P ow er 5V
LV D S C O N
TP C O N
P H Y
Y T 8511C
R G M II
U S B H U B
U S B 2514
1x4x2.0m m
1x4x2.0m m
2x
1
0x
2.
0m
m
1x2x2.0m m
T P A 3110D 2P
W P
A udio
12xG P IO s
U S B
T o T P
1x6x2.0m m
12V F or B acklight
MIPI
C O N C am era C O N
M IP I 4Lane
M IP I 4Lane
M .2 C on
F or 4G /LT E
P C Ie/S A T A /Q S G M II
3.5m m
A udio Jack
H eadphone
U S B 2
_H O S T2
12V /5A
U
SB3
_H
O
ST1
R J45 W ith internal M agnetics C onnector
U S B 2_H O S T 3
H
D
M
I 2
.0
G M A
C 1
U A R T 4_M 1 R S 232-2
U A R T 2_M 1 R S 232-3(D E B U G )
U A R T 9_M 1 T T L
U A R T 6_M 1 R S 485-1
U A R T 7_M 1 R S 485-2
B uttonx1
R E S E T
R E C O V E R Y
W G
S G M 820B
B uttonx1
A T 8340 R T C
I2C 5_M 0