Maintenance Manual
6
For receiving PZ-S series radio, the IF signal put into audio processor chip. The audio signal is on the
output pin of the audio processor. The audio signal can be amplified by Audio amplifier chip.
The CTCSS tone and DCS codes are decoded on the audio processor and pass through the microprocessor,
Audio Amplifier (U59)
The audio amplifier (U104) operates speaker and the maximum power output is 1.5 Watts with 16
Ω
speaker. The earphone jack (J100, J102) is for using an external speaker microphone.
R/F SECTION
The RF section consists of the following circuits;
A frequency synthesizer for generating the transmit carrier frequency and the first mixer injection
frequency for the receive circuitry.
Transmit circuits
Receive circuits
DC voltage regulator circuits and TX/RX switch circuits
SYNTHESIZER CIRCUIT
The synthesizer circuit consists of the reference oscillator (VCTCXO, U303), PLL IC (U302), Loop-Filter,
and VCO.
The microprocessor controlled frequency synthesizer circuit generates all transmit and receive RF
frequencies for the PZ-S series radio. This circuit uses a Voltage Controlled Oscillator (VCO) operating
on the actual transmit frequency of 400 ~ 470
㎒
(136~ 174
㎒
for VHF model) during transmit and 45.3
㎒
(21.4
㎒
for VHF band) below the actual receive frequency during the receive.
The PLL IC (U302) consists of the internal 19bit reference counter and the 19bit program divider, and is
controlled by MPU program. The PLL_EN, PLL_DATA and PLL_CLK signals program the synthesizer
circuit.
