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Doc. No: Unex-QSG-21-003

 

 

 

 

16/30

 

A printed version of this document is an uncontrolled copy

 

© 2023 Unex Technology Corporation – Company Confidential

 

Pin 

Symbol 

Type 

Level (V) 

Description 

Note 

35 

GND 

Ground 

 

37 

GND 

Ground 

 

39 

3.3 Vaux 

3.3 

Powered by 5V: 115mA (max) 
Powered by 3.3 Vaux: 3000mA (max) 

 

41 

3.3 Vaux 

3.3 

Powered by 5V: 115mA (max) 
Powered by 3.3 Vaux: 3000mA (max) 

 

43 

GND 

Ground 

 

45 

5V 

5V/2A power input 

Proprietary 

47 

5V 

5V/2A power input 

Proprietary 

49 

1PPS 

I (PU) 

3.3 

GNSS 1PPS input (active HIGH) 

Proprietary 

51 

TAMPER# 

(PU/PD) 

3.3 

Tamper detection (active LOW) 
PU/PD decided by SW1.7 
TRIGGER_SW ON: 1K

Ω PU 

TRIGGER_SW OFF: 32K

Ω PD (min) 

Proprietary 

Table 9: SOM-352 mini PCIe row 1 pinout 

Pin 

Symbol 

Type 

Level (V) 

Description 

Note 

3.3 Vaux 

3.3 

Powered by 5V: 115mA (max) 
Powered by 3.3 Vaux: 3000mA (max) 

 

GND 

Ground 

 

NC 

Not connected 

 

NC 

Not connected 

 

10 

NC 

Not connected 

 

12 

NC 

Not connected 

 

14 

NC 

Not connected 

 

16 

NC 

Not connected 

 

KEY 

Mechanical key 

 

18 

GND 

Ground 

 

20 

NC 

Not connected 

 

22 

PERST# 

I (PU) 

3.3 

CRATON2 reset (2K

Ω PU, active LOW) 

Signal rising edge (0 

 1) will reset 

mPCIe module 

 

24 

3.3 Vaux 

3.3 

Powered by 5V: 115mA (max) 
Powered by 3.3 Vaux: 3000mA (max) 

 

26 

GND 

Ground 

 

28 

NC 

Not connected 

 

30 

NC 

Not connected 

 

32 

NC 

Not connected 

 

34 

GND 

Ground 

 

36 

USB_D- 

I/O 

0.4 

USB data line - 

 

38 

USB_D+ 

I/O 

0.4 

USB data line + 

 

40 

GND 

Ground 

 

42 

NC 

Not connected 

 

44 

NC 

Not connected 

 

46 

BOOTSTRP 

I (PD) 

3.3 

BOOT_SW ON: 
    0 or NC: Boot from NAND 
    1: Boot from USB0 (DFU mode) 
BOOT_SW OFF: 
    0/1/NC: Boot from USB0 (DFU mode) 

Proprietary 

48 

NC 

Not connected 

 

50 

GND 

Ground 

 

Содержание SOM-352 Series

Страница 1: ...WAVE stack USA 0A1 Reviewers Department Name Acceptance Date Note PD Nidor Huang 2023 05 10 RD P C Kang 2023 05 10 Modification History Revision Date Originator Comment 0 1 2021 08 19 Nidor Huang Crea...

Страница 2: ...2 family Updating functional block diagram Adding mPCIe Pin 46 BOOTSTRP Adding 1PPS pin BSP description 0 7 2023 03 03 Nidor Huang Adding V2X antenna detection function Updating Unex BSP interface set...

Страница 3: ...er Consumption 10 8 I O Interfaces 11 8 1 Antenna Connectors 11 8 1 1 5 9GHz V2X 13 8 1 2 GNSS 14 8 2 Mini PCIe Card Pinout 15 8 3 I O Cable Pinout 17 8 4 DIP Switch 18 9 Design in Guidelines 19 9 1 P...

Страница 4: ...4 Antenna cable extraction tool 13 Figure 5 V2X antennas EX 55 EX 53 13 Figure 6 I O Cable mating component P N 18 Figure 7 Onboard DIP switch 18 Figure 8 USB data line routing example 21 Figure 9 Ext...

Страница 5: ...Doc No Unex QSG 21 003 5 30 A printed version of this document is an uncontrolled copy 2023 Unex Technology Corporation Company Confidential...

Страница 6: ...3 Limited Warranty Policy Unex Technology Corporation selling the product warrants that commencing from the date of shipment to customer and continuing for a period of twelve 12 months This limited wa...

Страница 7: ...ird party at the request of the Customer Customized and original design manufacturer ODM products The warranty terms for customized and ODM products should be defined in the contract that governs the...

Страница 8: ...30 A printed version of this document is an uncontrolled copy 2023 Unex Technology Corporation Company Confidential Figure 1 SOM 352 series appearance 6 Functional Block Diagram Figure 2 Functional b...

Страница 9: ...ed outside the Recommended Operating Conditions but within the Absolute Maximum Ratings the device may not be fully functional and this may affect device reliability functionality performance and shor...

Страница 10: ...rnal gain Gain loss combined 24 dB Note 1 UART UART_RX mPCIe P17 UART_TX mPCIe P19 RXD Molex P2 TXD Molex P3 2 TRIGGER_SW SW1 7 ON 3 TRIGGER_SW SW1 7 OFF 4 IOL Low level output current UART_TX 5 IOH H...

Страница 11: ...4 5 0 38 0 44 2 0 3 3 Vaux 5 3 3 0 105 0 110 0 115 Note 1 CPU idle and V2X stack loaded 2 CPU 50 and V2X transmitting 400 bytes at 20dBm every 100ms 3 Hardware upper limit 4 From Molex 7 pin connector...

Страница 12: ...ant aspects in the full product design as it strongly affects the RF performance Connecting cables between the module and the antenna must have 50 impedance If the impedance of the module is mismatche...

Страница 13: ...ar style will damage not only the antenna connector but also other components in proximity 3 Please follow HIM 10002 06EN for more detailed instructions 8 1 1 5 9GHz V2X The V2X antenna ports has a bu...

Страница 14: ...as the OPEN status if the antenna consumes more than 58 mA then it is considered as the SHORT status Anything between 12 58 mA is considered as the NORMAL status The GNSS 3 3V antenna bias will be co...

Страница 15: ...NC SOM 352 only needs group1 and group2 pins for normal operation For maximize compatibility with existing mPCIe modules on the market it is suggested to connect all three groups of pins to the mPCIe...

Страница 16: ...Ie row 1 pinout Pin Symbol Type Level V Description Note 2 3 3 Vaux P 3 3 Powered by 5V 115mA max Powered by 3 3 Vaux 3000mA max 4 GND G Ground 6 NC Not connected 8 NC Not connected 10 NC Not connecte...

Страница 17: ...m the SOM 352 side For designing an I O cable interface on the system board the input and output direction must be reversed Table 10 I O cable pinout Pin Name Type Level V Description J1 1 5V P 5 5V p...

Страница 18: ...ace or the I O cable The tamper signal trigger mode and firmware upgrade can also be selected by user Figure 7 Onboard DIP switch Please note that the in SW1 1 to SW1 6 the OFF position actually disco...

Страница 19: ...ign in Guidelines The SOM 352 pinout is compatible with most standard PCIe mini card interfaces However it may need to be fed with 5V DC power and connecting other I O interfaces through an external c...

Страница 20: ...into normal operation with the rising edge of PERST or EX_RSTn signal 9 4 Grounding Ensure good GND connection between the ground of the module and the ground of the system board Grounding of the exte...

Страница 21: ...the same trace length and not parallel with other signals to minimize crosstalk Separate the signal traces into similar groups and route similar signal traces together In addition it is recommended t...

Страница 22: ...than SOM 352 power up The 1PPS input pins mPCIe pin 49 and I O cable pin 5 will be pulled high by default during boot up up to 200ms If the 1PPS also serves as BOOT MODE pin in the external GNSS modu...

Страница 23: ...n The pull up resistor of BOOTSTRP should not exceed 5 KOhm 9 10 Tamper Detection Optional The tamper detection function will be supported by project base It is disabled by default The SOM 352 has to...

Страница 24: ...the chip anymore Two additional tamper modes are available when entering production mode normal mode and standby mode 9 10 1 1 Normal Mode Tamper response provides protection against tamper attempts...

Страница 25: ...m board to help disperse heat Inserting a soft silicone thermally conductive pad between the system board and SOM 352 could facilitate heat dispersion to the system board more efficiently Figure 10 Th...

Страница 26: ...e PCIe full mini card form factor but 8 5mm wider than the standard 30mm width When designing a system board at least 3mm clearance on both left and right side is needed to avoid component interferenc...

Страница 27: ...nsions Table 12 Dimensions and weight Model Length mm Width mm Height mm Weight g SOM 352 51 0 38 5 11 5 21 2 10 1 Component Keep Out Area Maximum height of bottom side components may reach 1 0mm In o...

Страница 28: ...ess grep V2X_0 etc unex device device_info txt BSP protocol version etc unex update log 11 1 Verifying the Integration with a Host System The following descriptions are applicable for Unex software pa...

Страница 29: ...he RNDIS driver for the host system The driver installation might include loading rndis_host ko with modprobe command or enabling CONFIG_USB_NET_RNDIS_HOST when compiling the Linux kernel The detailed...

Страница 30: ...power have been properly supplied by your motherboard 2 Check if the SW1 1 setting matches your hardware configuration 3 Check if the SW1 8 setting is at ON Boot from NAND position 4 Connect the UART...

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