Doc. No: Unex-QSG-21-003
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© 2021 Unex Technology Corporation – Company Confidential
together. In addition, it is recommended to have differential pairs routed together on
the system board.
•
For the USB traces, do not route them under oscillators, crystals, clock
synthesizers, magnetic devices or IC’s which could be using duplicate clocks.
Figure 7: USB data line routing example
9.6.
Serial Port
The serial port is typically a secondary interface between the SOM-301(v2)/SOM-351
mPCIe module and OEM hardware. The levels for SOM-301(v2)/SOM-351 UART is 3.3V
TTL logic level.
Depending on the design of serial port on the OEM hardware, a level translator circuit
might be needed to make the system operate properly (e.g., 5V to 3.3V or 1.8V to 3.3V).
The only configuration that does not need level translation is the 3.3V UART.
9.7.
Reset
The reset pin (PERST#, P22) is low active, and will reboot Linux when a rising edge of
input voltage (end of assertion) is detected. The reset pin is internally connected to 3.3V
with a 2KΩ pull-up resistor. Connecting this pin to an open drain or open collector driver is
recommended if the motherboard logic level is different from 3.3V TTL.
9.8.
1PPS
The 1PPS pin (P49) serves as the input of an external 1PPS (1 pulse per second)
signal. The start of a system time (UTC time) second will line up with the rising edge of this
