TOBY-R2 series - System integration manual
UBX-16010572 - R10
Design-in
Page 114 of 151
Reference
Description
Part Number - Manufacturer
C1
100 nF Capacitor Ceramic X5R 0402 10% 10V
GRM155R71C104KA01 – Murata
C2, C4, C5, C6
1
µ
F Capacitor Ceramic X5R 0402 10% 6.3 V
GRM155R60J105KE19 – Murata
C3
10
µ
F Capacitor Ceramic X5R 0603 20% 6.3 V
GRM188R60J106ME47 – Murata
C7, C8, C9, C10
27 pF Capacitor Ceramic COG 0402 5% 25 V
GRM1555C1H270JZ01 – Murata
C11, C12, C13, C14 10 nF Capacitor Ceramic X5R 0402 10% 50V
GRM155R71C103KA88 – Murata
D1, D2
Low Capacitance ESD Protection
USB0002RP or USB0002DP – AVX
EMI1, EMI2,
EMI3, EMI4
Chip Ferrite Bead Noise/EMI Suppression Filter
1800 Ohm at 100 MHz, 2700 Ohm at 1 GHz
BLM15HD182SN1 – Murata
J1
Microphone Connector
Various manufacturers
J2
Speaker Connector
Various manufacturers
MIC
2.2 k
Electret Microphone
Various manufacturers
R1, R2
4.7 k
Resistor 0402 5% 0.1 W
RC0402JR-074K7L - Yageo Phycomp
R3
10 k
Resistor 0402 5% 0.1 W
RC0402JR-0710KL - Yageo Phycomp
R4, R5
2.2 k
Resistor 0402 5% 0.1 W
RC0402JR-072K2L – Yageo Phycomp
SPK
32
Speaker
Various manufacturers
U1
16-Bit Mono Audio Voice Codec
MAX - Maxim
Table 48: Example of components for audio voice codec application circuit
☞
Do not apply voltage to any I2S pin before the switch-on of I2S supply source (V_INT), to avoid
latch-up of circuits and allow a proper boot of the module. If the external signals connected to the
cellular module cannot be tri-stated or set low, insert a multi channel digital switch (e.g. TI
SN74CB3Q16244, TS5A3159, or TS5A63157) between the two-circuit connections and set to high
impedance before V_INT switch-on.
☞
ESD sensitivity rating of I2S interface pins is 1 kV (Human Body Model according to JESD22-A114).
Higher protection level could be required if the lines are externally accessible and it can be achieved
by mounting a general purpose ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close
to accessible points.
☞
If the I2S digital audio pins are not used, they can be left unconnected on the application board.
2.7.1.2
Guidelines for digital audio layout design
I2S interface and clock output lines require the same consideration regarding electro-magnetic
interference as any other high speed digital interface. Keep the traces short and avoid coupling with
RF lines / parts or sensitive analog inputs, since the signals can cause the radiation of some harmonics
of the digital data frequency.
2.7.1.3
Guidelines for analog audio layout design
Accurate design of the analog audio circuit is very important to obtain clear and high quality audio.
The GSM signal burst has a repetition rate of 217 Hz that lies in the audible range. A careful layout is
required to reduce the risk of noise from audio lines due to both VCC burst noise coupling and RF
detection.
