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SARA-R5 series - System integration manual
UBX-19041356 - R04
System description
Page 11 of 118
C1-Public
1.3
Pin-out
lists the pin-out of the SARA-R5 series modules, with pins grouped by function.
Function Pin name
Pin no.
I/O Description
Remarks
Power
VCC
51, 52, 53 I
Module supply input VCC supply circuit affects the RF performance and compliance
of the device integrating the module with applicable required
certification schemes.
See section
for functional description / requirements.
See section
for external circuit design-in.
GND
1, 3, 5, 14,
20-22, 30,
32, 43,
50, 54,
55, 57-61,
63-96
N/A Ground
GND pins are internally connected to each other.
External ground connection affects the RF and thermal
performance of the device.
See section
for functional description.
See section
for external circuit design-in.
V_INT
4
O
Generic digital
interfaces supply
output
V_INT = 1.8 V (typical) generated by internal regulator when the
module is switched on, outside the low power PSM deep-sleep
mode.
See section
See section
for external circuit design-in.
Provide test point for diagnostic purposes.
System
PWR_ON
15
I
Power-on input
Internal active pull-up.
See sections
for functional description.
See section
for external circuit design-in.
Provide test point for diagnostic purposes.
RESET_N
18
I
External reset input Internal active pull-up.
See section
for functional description.
See section
for external circuit design-in.
Provide test point for diagnostic purposes.
Antenna
ANT
56
I/O Cellular antenna
50
nominal characteristic impedance.
Antenna circuit affects the RF performance and application
device compliance with required certification schemes.
See section
for functional description / requirements.
See section
for external circuit design-in.
ANT_GNSS
31
I
GNSS antenna
3
50
nominal characteristic impedance.
See section
for functional description / requirements.
See section
for external circuit design-in.
ANT_DET
62
I
Antenna detection ADC for antenna presence detection function.
See section
for functional description.
See section
for external circuit design-in.
SIM
VSIM
41
O
SIM supply output
VSIM = 1.8 V / 3 V output as per the connected SIM type.
See section
for functional description.
See section
for external circuit design-in.
SIM_IO
39
I/O SIM data
Data input/output for 1.8 V / 3 V SIM.
Internal pull-up to VSIM.
See section
for functional description.
See section
for external circuit design-in.
SIM_CLK
38
O
SIM clock
Clock output for 1.8 V / 3 V SIM.
See section
for functional description.
See section
for external circuit design-in.
SIM_RST
40
O
SIM reset
Reset output for 1.8 V / 3 V SIM.
See section
for functional description.
See section
for external circuit design-in.
3
Not supported by SARA-R500S and SARA-R510S modules