NINA-B4 series - System integration manual
UBX-19052230 - R09
Design-in
Page 30 of 61
C1-Public
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Minimize the routing length. Ensure that the maximum allowable length for high-speed buses is
not exceeded. Longer traces generally degrade signal performance.
•
Track impedance matched traces. Consult with your PCB manufacturer early in the project for
proper stack-up definition.
•
Separate the RF and digital sections of the board.
•
Ground splitting is not allowed under the module.
•
Minimize the bus length to reduce potential EMI issues from digital buses.
•
All traces (including low speed or DC traces) must couple with a reference plane (GND or power);
Hi-speed buses should be referenced against the ground plane. If any ground reference needs to
be changed, an adequate number of GND vias must be added in the area that the layer is switched.
This is necessary to provide a low impedance path between the two GND layers for the return
current.
•
Hi-Speed buses are not allowed to change reference plane. If changes in the reference plane are
unavoidable, capacitors must be added in the transition area of the reference planes. This is
necessary to ensure that a low impedance return path exists through the different reference
planes.
•
Following the “3w rule”, k
eep traces at a distance of no less than three times that of its own width
from the routing edge of the ground plane.
•
For EMC purposes and the need to shield against any potential radiation, it is advisable to add
GND stitching vias around the edge of the PCB. Traces on the PCB peripheral are not
recommended.
2.9.3
Thermal guidelines
NINA-B4 series modules have been successfully tested from
–
40 °C to +105 °C. NINA-B4 modules are
low-power devices that generate only a small amount of heat during operation. A good grounding
should still be observed for temperature relief during high ambient temperatures.
2.9.4
ESD guidelines
Device immunity against Electrostatic Discharge (ESD) is a requirement for Electromagnetic
Compatibility (EMC) conformance and use of the CE marking for products intended for sale in Europe.
For any product that integrates u-blox modules to bear the CE mark it must be conformance tested
in accordance with the R&TTE Directive (99/5/EC), EMC Directive (89/336/EEC), and Low Voltage
Directive (73/23/EEC) issued by the Commission of the European Community.
Compliance with the above directives also implies conformity to the following European norms for
device ESD immunity: ESD testing standard CENELEC EN 61000-4-2
, ETSI EN 301 489-7, ETSI EN 301 489-24. The ESD immunity
requirements for each of these standards are summarized in
The ESD immunity test is performed at the enclosure port, which is defined by ETSI EN 301 489-1 as
the physical boundary through which the electromagnetic field radiates. If the device implements an
integral antenna, the enclosure port is seen as all insulating and conductive surfaces housing the
device. If the device implements a removable antenna, the antenna port can be separated from the
enclosure port. The antenna port includes the antenna element and its interconnecting cable
surfaces.
The applicability of ESD immunity test to the whole device depends on the device classification as
defined by ETSI EN 301 489-1. Applicability of the ESD immunity test to the related device ports or
the related interconnecting cables to auxiliary equipment depends on device accessible interfaces
and manufacturer requirements, as defined by ETSI EN 301 489-1.