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LISA-U2 series - System Integration Manual
UBX-13001118 - R19
Early Production Information
Design-In
Page 121 of 175
2.2.1.3
USB signal
The LISA-U2 modules include a high-speed USB 2.0 compliant interface with a maximum throughput of 480
Mb/s (see Section 1.9.3). Signals
USB_D+
/
USB_D-
carry the USB serial data and signaling. The lines are used in
single ended mode for relatively low speed signaling handshake, as well as in differential mode for fast signaling
and data transfer. Characteristic impedance of
USB_D+
/
USB_D-
lines is specified by USB standard. The most
important parameter is the differential characteristic impedance applicable for odd-mode electromagnetic field,
which should be as close as possible to 90
differential: signal integrity may be degraded if PCB layout is not
optimal, especially when the USB signaling lines are very long.
Route
USB_D+
/
USB_D-
lines as a differential pair
Ensure the differential characteristic impedance (Z
0
) is as close as possible to 90
Ensure the common mode characteristic impedance (Z
CM
) is as close as possible to 30
Consider design rules for
USB_D+
/
USB_D-
similar to RF transmission lines, being them coupled differential
micro-strip or buried stripline: avoid any stubs, abrupt change of layout, and route on clear PCB area
Figure 59 and Figure 60 provide two examples of coplanar waveguide designs with differential characteristic
impedance close to 90
and common mode characteristic impedance close to 30
. The first transmission line
can be implemented in case of 4-layer PCB stack-up herein described, the second transmission line can be
implemented in case of 2-layer PCB stack-up herein described.
35 µm
35 µm
35 µm
35 µm
270 µm
270 µm
760 µm
L1 Copper
L3 Copper
L2 Copper
L4 Copper
FR-4 dielectric
FR-4 dielectric
FR-4 dielectric
350 µm 400 µm
400 µm
350 µm
400 µm
Figure 59: Example of USB line design, with Z
0
close to 90
and Z
CM
close to 30
, for the described 4-layer board layup
35 µm
35 µm
1510 µm
L2 Copper
L1 Copper
FR-4 dielectric
740 µm 410 µm
410 µm
740 µm
410 µm
Figure 60: Example of USB line design, with Z
0
close to 90
and Z
CM
close to 30
, for the described 2-layer board layup