LISA-U series - System Integration Manual
UBX-13001118 - R17
Advance information
System description
Page 20 of 190
1.5
Power management
1.5.1
Power supply circuit overview
LISA-U series modules feature a power management concept optimized for the most efficient use of supplied
power. This is achieved by hardware design utilizing a power efficient circuit topology (Figure 4), and by power
management software controlling the module’s power saving mode.
Baseband Processor
2G/3G
Power Amplifier(s)
Switching
Step-Down
5 x 10 µF
61
VCC
62
VCC
63
VCC
50
VSIM
2
V_BCKP
4
V_INT
Linear
LDO
Linear
LDO
Switching
Step-Down
Linear
LDO
Linear
LDO
Linear
LDO
I/O
EBU
CORE
Analog
SIM
RTC
NOR Flash
DDR SRAM
RF Transceiver
Memory
Power Management Unit
22 µF
10 µF (LISA-U1)
220 nF (LISA-U2)
220 nF
2G/3G PA
PMU
(LISA-U2)
Transceiver
PMU
(LISA-U2)
(LISA-U1)
Figure 4: LISA-U series power management simplified block diagram
Pins with supply function are reported in Table 7, Table 13 and Table 16.
LISA-U series modules must be supplied via the
VCC
pins. There is only one main power supply input, available
on the three
VCC
pins that must be all connected to the external power supply.