LISA-U1 series - System Integration Manual
3G.G2-HW-10002-3
Preliminary
System description
Page 38 of 125
LISA-U1 series
2
V_BCKP
22
RESET_N
Reset
push button
ESD
Open
Drain
Output
Application
Processor
LISA-U1 series
2
V_BCKP
22
RESET_N
Rint
Rint
FB1
C1
FB2
C2
Figure 19: RESET_N application circuits using a push button and an open drain output of an application processor
Reference
Description
Remarks
ESD
Varistor for ESD protection.
CT0402S14AHSG - EPCOS
C1, C2
47 pF Capacitor Ceramic C0G 0402 5% 50 V
GRM1555C1H470JA01 - Murata
FB1, FB2
Chip Ferrite Bead for Noise/EMI Suppression
BLM15HD182SN1 - Murata
Rint
10 k
Ω
Resistor 0402 5% 0.1 W
Internal pull-up resistor
Table 14: Example of ESD protection components for the RESET_N application circuit
1.7
RF connection
The
ANT
pin has 50 nominal characteristic impedance and must be connected to the antenna through a 50
transmission line to allow transmission and reception of radio frequency (RF) signals in the GSM and UMTS
operating bands.
Name
Description
Remarks
ANT
RF antenna
Zo = 50 nominal characteristic impedance.
Table 15: Antenna pin
The
ANT
port ESD immunity rating is 500 V (according to IEC 61000-4-2). Higher protection level could
be required if the line is externally accessible on the application board.
Choose an antenna with optimal radiating characteristics for the best electrical performance and overall module
functionality. An internal antenna, integrated on the application board, or an external antenna, connected to the
application board through a proper 50 connector, can be used. See section 2.4 and section 2.2.1.1 for further
details regarding antenna guidelines.