EVK-NORA-W1 - User guide
UBX-22002764 - R01
Hardware description
Page 14 of 22
C1-Public
3.8
External JTAG debug interface
External target hardware can be connected to J20 for firmware programming and debug. The JTAG
debug interface is implemented, as shown in
J20 is implemented with a 2x5, header with 1.27 mm pitch.
Figure 13: External J-Link debug interface