JODY-W2 - System integration manual
UBX-18068879 - R14
System description
Page 18 of 84
C1 - Public
Name
I/O
Description
Remarks
LPO_IN
I
32.768 kHz clock input
Failsafe pin.
Table 13: External 32.768 kHz sleep clock signal description
LPO_IN
is a failsafe input, clock signal that can be applied to the pin when the module is not powered
☞
Not applicable for automotive grade module variants.
Parameter
LPO clock
Unit
Nominal input frequency
32.768
kHz
Frequency accuracy
±250
ppm
Duty cycle
30
–
70
%
Input signal accuracy
200
–
3300
mV, pkpk
Signal type
Square-wave or Sine-wave
-
Input impedance
3
> 100
kΩ
< 5
pF
Clock jitter (during startup)
< 10,000
ppm
Table 14: External 32.768 kHz sleep clock specification
JTAG
–
Test Interface
A JTAG test interface is supported on chipset pins GPIO14
–
shows the mapping between
chipset and module pins.
Chip pin name
Module pin name
Supply domain
Description
GPIO_14
GPIO_14
VIO
JTAG_TCK test clock (Input)
GPIO_15
GPIO_15
VIO
JTAG_TMS controller select (Input)
GPIO_16
LTE_COEX_RX
VIO
UART_LTE_SIN / JTAG_TDI test data input (Input)
GPIO_17
LTE_COEX_TX
VIO
UART_LTE_SOUT / JTAG_TDO test data output (Output)
Table 15: JTAG signal mapping
1.5
Antenna interfaces
Wi-Fi and Bluetooth antennas
JODY-W2 provides two antenna pins, one for dual-band Wi-Fi connectivity (
ANT1
) and another for
Bluetooth (
ANT0
). The following recommendations apply to developing an antenna interface for the
JODY-W2 module:
•
Where possible, consider integrating in the end product the u-blox reference design to minimize
the effort on the certification process. For the full list of available reference designs, see the
JODY-W2 antenna reference design, application note
•
The
ANT0
and
ANT1
pins of JODY-W2 have a nominal characteristic impedance of 50
and must
be connected to the external antennas through a 50
transmission line to allow proper RF
transmission and reception.
•
Good isolation must be provided between the various antennas in the system. Special care shall be
taken to maximize isolation between the antennas operating in the same or nearby bands.
For information describing how to properly design circuits compliant with these requirements, see
3
When power is applied or switched off.