60
S1468-001-01
Appendix A: Post Codes
ISA POST codes are typically output to port address 80h ( Award
BIOS)
POST
Name
OEM specific-Cache control
C0
Turn off
Processor Status (1 FLAGS) verification.
Chipset cache
1
Processor Test 1
Test the following processor status flags; carry, zero, sign,
overflow. The BIOS will set each of these flags, verify they
are set, then turn each flag off and verify it is off
2
Processor Test 2
Read/Write/Verify all CPU reisters except SS,SP, and BP with
data patern FF and 00
3
Initialize chips
Disable NMI, PIE, AIE, UEI, SQWV, video, parity checking,
DMA. Reset math co-processor. Clear all page registers.
Initialize timer 0,1 and 2. Initialize DMA controllers 0 and 1.
Initialize interrupt controllers 0 and 1.
4
Test Memory
Assures that memory refresh function is working.
refresh toggle
5
Blank Video
Keyboard initialization
Initialize Keyboard
6
Reserved
7
Test CMOS and
Verifies CMOS is working properly, detects a bad battery.
battery status
BE
Chipset Default
Programs chipset registers with power on BIOS default
C1
Memory presence
OEM specific-Test to size on-board memory.
test
C5
Early shadow
OEM specific-early shadow enable for fast boot
C6
Cache presence
External cache size detection
test
8
Setup low memory
Clear low 64K memory. Test first 64K memory.
9
Early cache
Cache initialization
initialize
A
Setup Interrupt
Initialization first 120 interrupt vectors with
Vector Table
SPURIOUS_INT-HDLR and initialize INT 00h-1 Fh accoding
to INT_TBL.
B
Test CMOS
Test CMOS RAM Checksum.
C
Initialize keyboard
Detect type of keyboard controller. Set NUM_LOCK status.
D
Intialize video
Detect CPU clock. Read CMOS location 14h to find type of
interface
video. Detect and initialize video adapter.
E
Test video memory Test video memory, writer sign-on message to screen.
Setup shadow RAM. Enable shadow according to setup.
F
Test DMA
BIOS checksum test. Keyboard detect and initalization
controller 0
