Section 7 / Technical Details
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Manual | Rev. 2 | Doc. No.: 7771
Intel® Advanced Encryption Standard New Instructions (Intel® AES-NI):
Seven new
instructions available in the Skylake-S micro-architecture makes pervasive encryption in an IT
environment possible while enabling implementation that is faster and more affordable by
providing advanced data protection and greater hardware platform security.
SERIAL INTERCONNECT INTERFACE
PCI Express® 3.0, 2.0, and 1.1 compatible.
SERIAL INTERCONNECT SPEEDS
PCI Express 3.0 – 8.0GHz per lane
PCI Express 2.0 – 5.0GHz per lane
PCI Express 1.1 - 2.5GHz per lane
PLATFORM CONTROLLER HUB (PCH)
Intel® C622 Platform Controller Hub (Lewisburg)
MEMORY INTERFACE
The SSP8268 features six memory channels of unbuffered DDR4 with 1 DIMM per channel for a
maximum of 1.5TB of memory (across two CPUs). Each CPU socket supports up to six, unbuffered,
ECC PC4-23400 standard memory DIMMs. Non-ECC DDR4 DIMMs are also supported, but the two
memory types cannot be used together on the motherboard. The peak memory interface transfer
rate per channel is 2933MT/s when using PC4-23400 DIMMs.
The System BIOS automatically detects memory type, size and speed. Trenton Systems
recommends unbuffered ECC PC4-23400 DDR4 memory modules for use on the SSP8268. These
unbuffered ECC (64-bit) DDR4 DIMMs must be PC4-23400 compliant.
INTERRUPTS
The motherboard is fully PC compatible with interrupt steering for PCI plug and play compatibility.
BIOS (FLASH)
The SSP8268 board uses an Aptio® 5.x BIOS from American Megatrends Inc. (AMI). The BIOS
features built-in advanced CMOS setup for system parameters, peripheral management for
configuring on-board peripherals and other system parameters. The BIOS resides in a 128Mb
Macronix MX25L12835FM2I-10G SPI Serial EEPROM (SPI Flash). Custom BIOSs are available.